From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Tue, 21 Jan 2020 19:03:10 +0000 (+0100)
Subject: mtd: rawnand: denali_dt: make the core clock optional
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=11bcc5841ae6765e010a419bd6354b15ae4e1096;p=u-boot.git

mtd: rawnand: denali_dt: make the core clock optional

The "nand_x" and "ecc" clocks are currently optional. Make the core
clock optional in the same way. This will allow platforms with no clock
driver support to use this driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Marek Vasut <marex@denx.de> # On SoCFPGA Arria V
---

diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index 0ce81324b9..b1e14982c4 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -91,7 +91,7 @@ static int denali_dt_probe(struct udevice *dev)
 	if (ret)
 		ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
-		return ret;
+		clk.dev = NULL;
 
 	ret = clk_get_by_name(dev, "nand_x", &clk_x);
 	if (ret)
@@ -101,9 +101,11 @@ static int denali_dt_probe(struct udevice *dev)
 	if (ret)
 		clk_ecc.dev = NULL;
 
-	ret = clk_enable(&clk);
-	if (ret)
-		return ret;
+	if (clk.dev) {
+		ret = clk_enable(&clk);
+		if (ret)
+			return ret;
+	}
 
 	if (clk_x.dev) {
 		ret = clk_enable(&clk_x);