From: Alison Wang <b18965@freescale.com>
Date: Fri, 17 Oct 2014 07:26:36 +0000 (+0800)
Subject: arm: ls102xa: Select ge2_clk125 for eTSEC clock muxing
X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=0ab172353e14dbdb7278755de6feae3fc4b54c2f;p=u-boot.git

arm: ls102xa: Select ge2_clk125 for eTSEC clock muxing

EC1 pins in RCW can be selected as RGMII1, GPIO3, CAN1/2, FTM1 or
SAI1/2. There is a bug that EC3 RGMII could not work when selecting EC1
as other functionality except RGMII. The workaround is to select
ge2_clk125 for eTSEC clock muxing in register SCFG_ETSECCMCR.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
---

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 913dda92c5..d64b24c417 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -141,6 +141,7 @@ int board_early_init_f(void)
 
 #ifdef CONFIG_TSEC_ENET
 	out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
+	out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
 #endif
 
 #ifdef CONFIG_FSL_IFC