From: Simon Glass Date: Mon, 6 Jul 2015 18:54:36 +0000 (-0600) Subject: dm: test: Add a size to each reg property X-Git-Url: http://git.dujemihanovic.xyz/?a=commitdiff_plain;h=0503e8207c11c40bd53c41b88edbffe284a7658f;p=u-boot.git dm: test: Add a size to each reg property Each sandbox peripheral should have a size as well as a base address. This is required for regmaps to work, so make this change for all nodes that have an address. Signed-off-by: Simon Glass --- diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 51611009ae..c948df8c86 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -4,7 +4,7 @@ model = "sandbox"; compatible = "sandbox"; #address-cells = <1>; - #size-cells = <0>; + #size-cells = <1>; aliases { console = &uart0; @@ -28,7 +28,7 @@ }; a-test { - reg = <0>; + reg = <0 1>; compatible = "denx,u-boot-fdt-test"; ping-expect = <0>; ping-add = <0>; @@ -41,16 +41,16 @@ }; junk { - reg = <1>; + reg = <1 1>; compatible = "not,compatible"; }; no-compatible { - reg = <2>; + reg = <2 1>; }; b-test { - reg = <3>; + reg = <3 1>; compatible = "denx,u-boot-fdt-test"; ping-expect = <3>; ping-add = <3>; @@ -60,7 +60,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "denx,u-boot-test-bus"; - reg = <3>; + reg = <3 1>; ping-expect = <4>; ping-add = <4>; c-test@5 { @@ -84,14 +84,14 @@ }; d-test { - reg = <3>; + reg = <3 1>; ping-expect = <6>; ping-add = <6>; compatible = "google,another-fdt-test"; }; e-test { - reg = <3>; + reg = <3 1>; ping-expect = <6>; ping-add = <6>; compatible = "google,another-fdt-test"; @@ -146,7 +146,7 @@ i2c@0 { #address-cells = <1>; #size-cells = <0>; - reg = <0>; + reg = <0 1>; compatible = "sandbox,i2c"; clock-frequency = <100000>; eeprom@2c { @@ -229,7 +229,7 @@ spi@0 { #address-cells = <1>; #size-cells = <0>; - reg = <0>; + reg = <0 1>; compatible = "sandbox,spi"; cs-gpios = <0>, <&gpio_a 0>; spi.bin@0 { @@ -242,12 +242,15 @@ syscon@0 { compatible = "sandbox,syscon0"; - reg = <0x10>; + reg = <0x10 4>; }; syscon@1 { compatible = "sandbox,syscon1"; - reg = <0x20>; + reg = <0x20 5 + 0x28 6 + 0x30 7 + 0x38 8>; }; uart0: serial {