AT91CAP9 support : cpu/ files

Signed-off-by: Stelian Pop <stelian <at> popies.net>

diff --git a/cpu/arm926ejs/at91cap9/Makefile b/cpu/arm926ejs/at91cap9/Makefile
new file mode 100644 (file)
index 0000000..bf15e1e
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2008
+# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(SOC).a
+
+COBJS  = ether.o timer.o spi.o usb.o
+SOBJS  = lowlevel_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):        $(OBJS)
+       $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

diff --git a/cpu/arm926ejs/at91cap9/config.mk b/cpu/arm926ejs/at91cap9/config.mk
new file mode 100644 (file)
index 0000000..ca2cae1
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/config.mk
@@ -0,0 +1,2 @@
+PLATFORM_CPPFLAGS += -march=armv5te
+PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,)

diff --git a/cpu/arm926ejs/at91cap9/ether.c b/cpu/arm926ejs/at91cap9/ether.c
new file mode 100644 (file)
index 0000000..b7958d5
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/ether.c
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91CAP9.h>
+
+extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
+
+#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
+void at91cap9_eth_initialize(bd_t *bi)
+{
+       macb_eth_initialize(0, (void *)AT91C_BASE_MACB, 0x00);
+}
+#endif

diff --git a/cpu/arm926ejs/at91cap9/lowlevel_init.S b/cpu/arm926ejs/at91cap9/lowlevel_init.S
new file mode 100644 (file)
index 0000000..24d950c
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/lowlevel_init.S
@@ -0,0 +1,43 @@
+/*
+ * AT91CAP9 setup stuff
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+
+.globl lowlevel_init
+lowlevel_init:
+
+       /*
+        * Clocks/SDRAM initialization is handled by at91bootstrap,
+        * no need to do it here...
+        */
+       mov     pc, lr
+
+       .ltorg
+
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

diff --git a/cpu/arm926ejs/at91cap9/spi.c b/cpu/arm926ejs/at91cap9/spi.c
new file mode 100644 (file)
index 0000000..0953820
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/spi.c
@@ -0,0 +1,119 @@
+/*
+ * Driver for ATMEL DataFlash support
+ * Author : Hamid Ikdoumi (Atmel)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/hardware.h>
+
+#ifdef CONFIG_HAS_DATAFLASH
+#include <dataflash.h>
+
+/* Max Value = 10MHz to be compliant to the Continuous Array Read function */
+#define AT91C_SPI_CLK  10000000
+
+/* AC Characteristics: DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
+#define DATAFLASH_TCSS (0xFA << 16)
+#define DATAFLASH_TCHS (0x8 << 24)
+
+#define AT91C_TIMEOUT_WRDY             200000
+#define AT91C_SPI_PCS0_DATAFLASH_CARD  0xE     /* Chip Select 0: NPCS0%1110 */
+#define AT91C_SPI_PCS3_DATAFLASH_CARD  0x7     /* Chip Select 3: NPCS3%0111 */
+
+void AT91F_SpiInit(void)
+{
+       /* Reset the SPI */
+       AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SWRST;
+
+       /* Configure SPI in Master Mode with No CS selected !!! */
+       AT91C_BASE_SPI0->SPI_MR =
+               AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
+
+       /* Configure CS0 */
+       AT91C_BASE_SPI0->SPI_CSR[0] =
+               AT91C_SPI_CPOL |
+               (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
+               (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
+               ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
+}
+
+void AT91F_SpiEnable(int cs)
+{
+       switch (cs) {
+       case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
+               AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF;
+               AT91C_BASE_SPI0->SPI_MR |=
+                       ((AT91C_SPI_PCS0_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
+               break;
+       case 3:
+               AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF;
+               AT91C_BASE_SPI0->SPI_MR |=
+                       ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
+               break;
+       }
+
+       /* SPI_Enable */
+       AT91C_BASE_SPI0->SPI_CR = AT91C_SPI_SPIEN;
+}
+
+unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
+{
+       unsigned int timeout;
+
+       pDesc->state = BUSY;
+
+       AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+
+       /* Initialize the Transmit and Receive Pointer */
+       AT91C_BASE_SPI0->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt;
+       AT91C_BASE_SPI0->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt;
+
+       /* Intialize the Transmit and Receive Counters */
+       AT91C_BASE_SPI0->SPI_RCR = pDesc->rx_cmd_size;
+       AT91C_BASE_SPI0->SPI_TCR = pDesc->tx_cmd_size;
+
+       if (pDesc->tx_data_size != 0) {
+               /* Initialize the Next Transmit and Next Receive Pointer */
+               AT91C_BASE_SPI0->SPI_RNPR = (unsigned int)pDesc->rx_data_pt;
+               AT91C_BASE_SPI0->SPI_TNPR = (unsigned int)pDesc->tx_data_pt;
+
+               /* Intialize the Next Transmit and Next Receive Counters */
+               AT91C_BASE_SPI0->SPI_RNCR = pDesc->rx_data_size;
+               AT91C_BASE_SPI0->SPI_TNCR = pDesc->tx_data_size;
+       }
+
+       /* arm simple, non interrupt dependent timer */
+       reset_timer_masked();
+       timeout = 0;
+
+       AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
+       while (!(AT91C_BASE_SPI0->SPI_SR & AT91C_SPI_RXBUFF) &&
+               ((timeout = get_timer_masked()) < CFG_SPI_WRITE_TOUT));
+       AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+       pDesc->state = IDLE;
+
+       if (timeout >= CFG_SPI_WRITE_TOUT) {
+               printf("Error Timeout\n\r");
+               return DATAFLASH_ERROR;
+       }
+
+       return DATAFLASH_OK;
+}
+#endif

diff --git a/cpu/arm926ejs/at91cap9/timer.c b/cpu/arm926ejs/at91cap9/timer.c
new file mode 100644 (file)
index 0000000..4110e15
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/timer.c
@@ -0,0 +1,149 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop <at> leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+
+/*
+ * We're using the AT91CAP9 PITC in 32 bit mode, by
+ * setting the 20 bit counter period to its maximum (0xfffff).
+ */
+#define TIMER_LOAD_VAL 0xfffff
+#define READ_RESET_TIMER (AT91C_BASE_PITC->PITC_PIVR)
+#define READ_TIMER (AT91C_BASE_PITC->PITC_PIIR)
+#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4)
+#define TICKS_TO_USEC(ticks) ((ticks) / 6)
+
+ulong get_timer_masked(void);
+ulong resettime;
+
+AT91PS_PITC p_pitc;
+
+/* nothing really to do with interrupts, just starts up a counter. */
+int interrupt_init(void)
+{
+       /*
+        * Enable PITC Clock
+        * The clock is already enabled for system controller in boot
+        */
+       AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS;
+
+       /* Enable PITC */
+       AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN;
+
+       /* Load PITC_PIMR with the right timer value */
+       AT91C_BASE_PITC->PITC_PIMR |= TIMER_LOAD_VAL;
+
+       reset_timer_masked();
+
+       return 0;
+}
+
+/*
+ * timer without interrupts
+ */
+
+static inline ulong get_timer_raw(void)
+{
+       ulong now = READ_TIMER;
+       if (now >= resettime)
+               return now - resettime;
+       else
+               return 0xFFFFFFFFUL - (resettime - now) ;
+}
+
+void reset_timer_masked(void)
+{
+       resettime = READ_TIMER;
+}
+
+ulong get_timer_masked(void)
+{
+       return TICKS_TO_USEC(get_timer_raw());
+
+}
+
+void udelay_masked(unsigned long usec)
+{
+       ulong tmp;
+
+       tmp = get_timer(0);
+       while (get_timer(tmp) < usec)   /* our timer works in usecs */
+               ; /* NOP */
+}
+
+void reset_timer(void)
+{
+       reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+       ulong now = get_timer_masked();
+
+       if (now >= base)
+               return now - base;
+       else
+               return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ;
+}
+
+void udelay(unsigned long usec)
+{
+       udelay_masked(usec);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+       return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+       ulong tbclk;
+       tbclk = CFG_HZ;
+       return tbclk;
+}
+
+/*
+ * Reset the cpu by setting up the watchdog timer and let him time out
+ * on the AT91CAP9ADK board
+ */
+void reset_cpu(ulong ignored)
+{
+       /* this is the way Linux does it */
+       AT91C_BASE_RSTC->RSTC_RCR = (0xA5 << 24) |
+                                   AT91C_RSTC_PROCRST |
+                                   AT91C_RSTC_PERRST;
+
+       while (1);
+       /* Never reached */
+}

diff --git a/cpu/arm926ejs/at91cap9/usb.c b/cpu/arm926ejs/at91cap9/usb.c
new file mode 100644 (file)
index 0000000..69da5f3
--- /dev/null
+++ b/cpu/arm926ejs/at91cap9/usb.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2006
+ * DENX Software Engineering <mk <at> denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+#ifdef CONFIG_AT91CAP9
+
+#include <asm/arch/hardware.h>
+
+int usb_cpu_init(void)
+{
+       /* Enable USB host clock. */
+       AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UHP;
+       AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_UHP;
+
+       return 0;
+}
+
+int usb_cpu_stop(void)
+{
+       /* Disable USB host clock. */
+       AT91C_BASE_PMC->PMC_PCDR = 1 << AT91C_ID_UHP;
+       AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UHP;
+       return 0;
+}
+
+int usb_cpu_init_fail(void)
+{
+       return usb_cpu_stop();
+}
+
+#endif /* CONFIG_AT91CAP9 */
+#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */

diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c
index 9cac969f64abd775e359b94dfb73ac4528469b35..33da56a971981dd2897ceb34946d362fd60bc517 100644 (file)
--- a/cpu/arm926ejs/interrupts.c
+++ b/cpu/arm926ejs/interrupts.c
@@ -172,7 +172,7 @@ void do_irq (struct pt_regs *pt_regs)
        bad_mode ();
 }
 
-#ifdef CONFIG_INTEGRATOR
+#if defined(CONFIG_INTEGRATOR) || defined(CONFIG_AT91CAP9ADK)
 
        /* Timer functionality supplied by Integrator board (AP or CP) */
 

diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index aa09fbf724eebcf5835adbd45a69214f6f1ac1f1..297efe07c26fd5d50674f4060f0685ab2e371b8d 100644 (file)
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -182,6 +182,9 @@ clbss_l:str r2, [r0]                /* clear loop...                    */
        cmp     r0, r1
        ble     clbss_l
 
+       bl coloured_LED_init
+       bl red_LED_on
+
        ldr     pc, _start_armboot
 
 _start_armboot: