DTS: Add esdhc3 device tree description tuning for HSC|DDC boards

In this commit the esdhc3 controller is enabled as well as it is remaped
to mmc0 to not break legacy code.

The pinctrl setup (e.g. 0x1e4) is the same as one from in-board file
definition.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

diff --git a/arch/arm/dts/imx53-kp.dts b/arch/arm/dts/imx53-kp.dts
index 4e1d8af95786bf998694d74e70db9af7678ebb64..a5763730e20f6aa5d2faa5930e707fcf3028383f 100644 (file)
--- a/arch/arm/dts/imx53-kp.dts
+++ b/arch/arm/dts/imx53-kp.dts
@@ -17,6 +17,18 @@
        chosen {
                stdout-path = &uart2;
        };
+
+       aliases {
+               mmc0 = &esdhc3;
+       };
+};
+
+&esdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esdhc3>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
 };
 
 &fec {
@@ -61,6 +73,21 @@
        pinctrl-0 = <&pinctrl_hog>;
 
        imx53-kp {
+               pinctrl_esdhc3: esdhc3grp {
+                       fsl,pins = <
+                               MX53_PAD_PATA_DATA8__ESDHC3_DAT0        0x1d4
+                               MX53_PAD_PATA_DATA9__ESDHC3_DAT1        0x1d4
+                               MX53_PAD_PATA_DATA10__ESDHC3_DAT2       0x1d4
+                               MX53_PAD_PATA_DATA11__ESDHC3_DAT3       0x1d4
+                               MX53_PAD_PATA_DATA0__ESDHC3_DAT4        0x1d4
+                               MX53_PAD_PATA_DATA1__ESDHC3_DAT5        0x1d4
+                               MX53_PAD_PATA_DATA2__ESDHC3_DAT6        0x1d4
+                               MX53_PAD_PATA_DATA3__ESDHC3_DAT7        0x1d4
+                               MX53_PAD_PATA_RESET_B__ESDHC3_CMD       0x1e4
+                               MX53_PAD_PATA_IORDY__ESDHC3_CLK         0x1d4
+                       >;
+               };
+
                pinctrl_eth: ethgrp {
                        fsl,pins = <
                                MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc