]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
serial: stm32: Replace setparity by setconfig
authorPatrice Chotard <patrice.chotard@st.com>
Fri, 3 Aug 2018 13:07:39 +0000 (15:07 +0200)
committerTom Rini <trini@konsulko.com>
Tue, 11 Sep 2018 00:20:38 +0000 (20:20 -0400)
Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
drivers/serial/serial_stm32.c

index f26234549c3e18ee18b7d532ac707c379dd83067..66e02d5689d09ddc052b3d184c008a5b384ac50e 100644 (file)
@@ -47,20 +47,28 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
        return 0;
 }
 
-static int stm32_serial_setparity(struct udevice *dev, enum serial_par parity)
+static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
 {
        struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
        bool stm32f4 = plat->uart_info->stm32f4;
        u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
        u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
        u32 config = 0;
-
-       if (stm32f4)
-               return -EINVAL; /* not supported in driver*/
+       uint parity = SERIAL_GET_PARITY(serial_config);
+       uint bits = SERIAL_GET_BITS(serial_config);
+       uint stop = SERIAL_GET_STOP(serial_config);
+
+       /*
+        * only parity config is implemented, check if other serial settings
+        * are the default one.
+        * (STM32F4 serial IP didn't support parity setting)
+        */
+       if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
+               return -ENOTSUPP; /* not supported in driver*/
 
        clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
        /* update usart configuration (uart need to be disable)
-        * PCE: parity check control
+        * PCE: parity check enable
         * PS : '0' : Even / '1' : Odd
         * M[1:0] = '00' : 8 Data bits
         * M[1:0] = '01' : 9 Data bits with parity
@@ -77,6 +85,7 @@ static int stm32_serial_setparity(struct udevice *dev, enum serial_par parity)
                config = USART_CR1_PCE | USART_CR1_M0;
                break;
        }
+
        clrsetbits_le32(cr1,
                        USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
                        USART_CR1_M0,
@@ -210,7 +219,7 @@ static const struct dm_serial_ops stm32_serial_ops = {
        .pending = stm32_serial_pending,
        .getc = stm32_serial_getc,
        .setbrg = stm32_serial_setbrg,
-       .setparity = stm32_serial_setparity
+       .setconfig = stm32_serial_setconfig
 };
 
 U_BOOT_DRIVER(serial_stm32) = {