imx: firmware: sci: add inline functions when IMX8 not enabled

Since we might reuse some drivers for other platforms, while the drivers
have sci firmware api, so to avoid build failure add inline functions

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/include/firmware/imx/sci/sci.h b/include/firmware/imx/sci/sci.h
index dafe892aa4d33e9911b6e7a20294f8ac75d523f1..61c8211b44364ffa3f9c7781a6ac670ddde1aaf0 100644 (file)
--- a/include/firmware/imx/sci/sci.h
+++ b/include/firmware/imx/sci/sci.h
@@ -57,6 +57,7 @@ static inline int sc_err_to_linux(sc_err_t err)
        return ret;
 }
 
+#if IS_ENABLED(CONFIG_IMX8)
 /* PM API*/
 int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
                                  sc_pm_power_mode_t mode);
@@ -134,5 +135,245 @@ int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data);
 int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access,
                          u32 *data0, u32 *data1, u32 *data2, u32 *data3,
                          u32 *data4, u8 size);
+#else
+/* PM API*/
+static inline int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
+                                               sc_pm_power_mode_t mode)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
+                                               sc_pm_power_mode_t *mode)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
+                                      sc_pm_clock_rate_t *rate)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
+                                      sc_pm_clock_rate_t *rate)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
+                                    sc_bool_t enable, sc_bool_t autog)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
+                                        sc_pm_clk_parent_t parent)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
+                                 sc_faddr_t address)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt)
+{
+       return false;
+}
+
+static inline int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource)
+{
+       return -EOPNOTSUPP;
+}
+
+/* MISC API */
+static inline int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, u32 val)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, u32 *val)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev)
+{
+}
+
+static inline void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status)
+{
+}
+
+static inline int sc_misc_get_boot_container(sc_ipc_t ipc, u8 *idx)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline void sc_misc_build_info(sc_ipc_t ipc, u32 *build, u32 *commit)
+{
+}
+
+static inline int sc_misc_otp_fuse_read(sc_ipc_t ipc, u32 word, u32 *val)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp,
+                                  s16 *celsius, s8 *tenths)
+{
+       return -EOPNOTSUPP;
+}
+
+/* RM API */
+static inline sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr)
+{
+       return true;
+}
+
+static inline int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start,
+                                   sc_faddr_t addr_end)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, sc_rm_pt_t pt,
+                                              sc_rm_perm_t perm)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start,
+                                       sc_faddr_t *addr_end)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource)
+{
+       return true;
+}
+
+static inline int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure,
+                                       sc_bool_t isolated, sc_bool_t restricted,
+                                       sc_bool_t grant, sc_bool_t coherent)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad)
+{
+       return true;
+}
+
+static inline int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_pt_t *pt)
+{
+       return -EOPNOTSUPP;
+}
+
+/* PAD API */
+static inline int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val)
+{
+       return -EOPNOTSUPP;
+}
+
+/* SMMU API */
+static inline int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid)
+{
+       return -EOPNOTSUPP;
+}
+
+/* SECO API */
+static inline int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, sc_faddr_t addr)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l, u32 *uid_h)
+{
+       return -EOPNOTSUPP;
+}
+
+void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit)
+{
+}
+
+static inline int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr,
+                                      sc_faddr_t export_addr, u16 max_size)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr, u16 dst_size)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, u8 size, u8 lock)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr, u16 msg_size,
+                                     sc_faddr_t dst_addr, u16 dst_size)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data)
+{
+       return -EOPNOTSUPP;
+}
+
+static inline int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data0, u32 *data1,
+                                       u32 *data2, u32 *data3, u32 *data4, u8 size)
+{
+       return -EOPNOTSUPP;
+}
+
+#endif
 
 #endif