MPC8544DS: decode pcie3 end-point configuration correctly.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 81070164c1fa0465d320615c7e40407ce0ae6d60..dd10af8092e0e1a4887e77bf6efe351ceb6870a0 100644 (file)
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -163,7 +163,7 @@ pci_init_board(void)
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE3_ADDR;
        extern void fsl_pci_init(struct pci_controller *hose);
        struct pci_controller *hose = &pcie3_hose;
-       int pcie_ep = (host_agent == 3);
+       int pcie_ep = (host_agent == 1);
        int pcie_configured  = io_sel >= 1;
 
        if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){