]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: renesas: Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 17 Sep 2023 14:13:08 +0000 (16:13 +0200)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 30 Sep 2023 22:08:29 +0000 (00:08 +0200)
Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arch/arm/dts/condor-common.dtsi
arch/arm/dts/r8a77980-condor.dts
arch/arm/dts/r8a77980-v3hsk.dts
arch/arm/dts/r8a77980.dtsi

index dfbe35bf46e00c72fef4baddab9ccaeb6bcb4dac..7c34d14dcd7e1ca0d4007059c230c0542357fce8 100644 (file)
@@ -21,6 +21,7 @@
 
        chosen {
                stdout-path = "serial0:115200n8";
+               bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
        };
 
        d1_8v: regulator-2 {
index 1d326552e2facd06b93fe0e0cd21d48c8c7f60c9..68d1f1d53b3a38b41d69609dbdf9e15072323b13 100644 (file)
        model = "Renesas Condor board based on r8a77980";
        compatible = "renesas,condor", "renesas,r8a77980";
 };
+
+&i2c0 {
+       eeprom@50 {
+               compatible = "rohm,br24t01", "atmel,24c01";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
+};
index d168b0e7747d349428956cc267491f398768c2ee..77d22df25fffac6d41e9ca64c7f2fb39ee91580b 100644 (file)
        phy0: ethernet-phy@0 {
                compatible = "ethernet-phy-id0022.1622",
                             "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
                reg = <0>;
                interrupt-parent = <&gpio4>;
                interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
index c4ac28a0f7161d000714571af0cb6b44fa01ec21..5ed2daaca1f006493f037e7e84a782161d904219 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        resets = <&cpg 319>;
                        phys = <&pcie_phy>;
                        phy-names = "pcie";
+                       iommu-map = <0 &ipmmu_vi0 5 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };