ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support

Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for
PH1-LD6b reference board.

Import from Linux with some adjustments:
  - Use SPDX-License-Identifier
  - Add clock-frequency to serial nodes
  - Drop unusable nodes from -ref.dts

While I am here, sort Makefile entries alphabetically.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9a2f5f5d5ccdec21d2a899a095c67c19a3eee32..c4c43447599395ca77d0c4adc7fd5d7508847f87 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -38,9 +38,10 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
        tegra210-p2371-0000.dtb \
        tegra210-p2571.dtb
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
-       uniphier-ph1-sld3-ref.dtb \
-       uniphier-ph1-pro4-ref.dtb \
        uniphier-ph1-ld4-ref.dtb \
+       uniphier-ph1-ld6b-ref.dtb \
+       uniphier-ph1-pro4-ref.dtb \
+       uniphier-ph1-sld3-ref.dtb \
        uniphier-ph1-sld8-ref.dtb
 dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
        zynq-zc706.dtb \

diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
new file mode 100644 (file)
index 0000000..58dc20e
--- /dev/null
+++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
@@ -0,0 +1,59 @@
+/*
+ * Device Tree Source for UniPhier PH1-LD6b Reference Board
+ *
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-ld6b.dtsi"
+/include/ "uniphier-ref-daughter.dtsi"
+
+/ {
+       model = "UniPhier PH1-LD6b Reference Board";
+       compatible = "socionext,ph1-ld6b-ref", "socionext,ph1-ld6b";
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,115200";
+               stdout-path = &serial0;
+       };
+
+       aliases {
+               serial0 = &serial0;
+               serial1 = &serial1;
+               serial2 = &serial2;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+       };
+};
+
+&serial0 {
+       status = "okay";
+};
+
+&serial1 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+/* for U-boot only */
+&serial0 {
+       u-boot,dm-pre-reloc;
+};

diff --git a/arch/arm/dts/uniphier-ph1-ld6b.dtsi b/arch/arm/dts/uniphier-ph1-ld6b.dtsi
new file mode 100644 (file)
index 0000000..cf02e62
--- /dev/null
+++ b/arch/arm/dts/uniphier-ph1-ld6b.dtsi
@@ -0,0 +1,31 @@
+/*
+ * Device Tree Source for UniPhier PH1-LD6b SoC
+ *
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+        X11
+ */
+
+/*
+ * PH1-LD6b consists of two silicon dies: D-chip and A-chip.
+ * The D-chip (digital chip) is the same as the ProXstream2 die.
+ * Reuse the ProXstream2 device tree with some properties overridden.
+ */
+/include/ "uniphier-proxstream2.dtsi"
+
+/ {
+       compatible = "socionext,ph1-ld6b";
+};
+
+/* UART3 unavilable: the pads are not wired to the package balls */
+&serial3 {
+       status = "disabled";
+};
+
+/*
+ * PH1-LD6b and ProXstream2 have completely different packages,
+ * which makes the pinctrl driver unshareable.
+ */
+&pinctrl {
+       compatible = "socionext,ph1-ld6b-pinctrl", "syscon";
+};

diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
new file mode 100644 (file)
index 0000000..8b496a7
--- /dev/null
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -0,0 +1,241 @@
+/*
+ * Device Tree Source for UniPhier ProXstream2 SoC
+ *
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+        X11
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       compatible = "socionext,proxstream2";
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               enable-method = "socionext,uniphier-smp";
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0>;
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <1>;
+               };
+
+               cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <2>;
+               };
+
+               cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <3>;
+               };
+       };
+
+       clocks {
+               arm_timer_clk: arm_timer_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <88900000>;
+               };
+
+               i2c_clk: i2c_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               interrupt-parent = <&intc>;
+
+               extbus: extbus {
+                       compatible = "simple-bus";
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+               };
+
+               serial0: serial@54006800 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart0>;
+                       interrupts = <0 33 4>;
+                       clocks = <&uart_clk>;
+                       clock-frequency = <88900000>;
+               };
+
+               serial1: serial@54006900 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart1>;
+                       interrupts = <0 35 4>;
+                       clocks = <&uart_clk>;
+                       clock-frequency = <88900000>;
+               };
+
+               serial2: serial@54006a00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart2>;
+                       interrupts = <0 37 4>;
+                       clocks = <&uart_clk>;
+                       clock-frequency = <88900000>;
+               };
+
+               serial3: serial@54006b00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006b00 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart3>;
+                       interrupts = <0 177 4>;
+                       clocks = <&uart_clk>;
+                       clock-frequency = <88900000>;
+               };
+
+               i2c0: i2c@58780000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58780000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c0>;
+                       interrupts = <0 41 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@58781000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58781000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c1>;
+                       interrupts = <0 42 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c2: i2c@58782000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58782000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2>;
+                       interrupts = <0 43 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c3: i2c@58783000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58783000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c3>;
+                       interrupts = <0 44 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               /* chip-internal connection for DMD */
+               i2c4: i2c@58784000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58784000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 45 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               /* chip-internal connection for STM */
+               i2c5: i2c@58785000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58785000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 25 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               /* chip-internal connection for HDMI */
+               i2c6: i2c@58786000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58786000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 26 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               system-bus-controller-misc@59800000 {
+                       compatible = "socionext,uniphier-system-bus-controller-misc",
+                                    "syscon";
+                       reg = <0x59800000 0x2000>;
+               };
+
+               pinctrl: pinctrl@5f801000 {
+                       compatible = "socionext,proxstream2-pinctrl", "syscon";
+                       reg = <0x5f801000 0xe00>;
+               };
+
+               timer@60000200 {
+                       compatible = "arm,cortex-a9-global-timer";
+                       reg = <0x60000200 0x20>;
+                       interrupts = <1 11 0xf04>;
+                       clocks = <&arm_timer_clk>;
+               };
+
+               timer@60000600 {
+                       compatible = "arm,cortex-a9-twd-timer";
+                       reg = <0x60000600 0x20>;
+                       interrupts = <1 13 0xf04>;
+                       clocks = <&arm_timer_clk>;
+               };
+
+               intc: interrupt-controller@60001000 {
+                       compatible = "arm,cortex-a9-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x60001000 0x1000>,
+                             <0x60000100 0x100>;
+               };
+       };
+};
+
+/include/ "uniphier-pinctrl.dtsi"