clk: rk3399: Enable/Disable the USB2PHY clk

Enable/Disable the USB2PHY clk for rk3399.

CLK is clear in enable and set in disable functionality.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 4caf3b5617653f708a1879ec2108d80e7ab84dfc..773d2176e674a72374c6a82a40913defda1ccf26 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1094,6 +1094,12 @@ static int rk3399_clk_enable(struct clk *clk)
        case SCLK_MACREF_OUT:
                rk_clrreg(&priv->cru->clkgate_con[5], BIT(6));
                break;
+       case SCLK_USB2PHY0_REF:
+               rk_clrreg(&priv->cru->clkgate_con[6], BIT(5));
+               break;
+       case SCLK_USB2PHY1_REF:
+               rk_clrreg(&priv->cru->clkgate_con[6], BIT(6));
+               break;
        case ACLK_GMAC:
                rk_clrreg(&priv->cru->clkgate_con[32], BIT(0));
                break;
@@ -1170,6 +1176,12 @@ static int rk3399_clk_disable(struct clk *clk)
        case SCLK_MACREF_OUT:
                rk_setreg(&priv->cru->clkgate_con[5], BIT(6));
                break;
+       case SCLK_USB2PHY0_REF:
+               rk_setreg(&priv->cru->clkgate_con[6], BIT(5));
+               break;
+       case SCLK_USB2PHY1_REF:
+               rk_setreg(&priv->cru->clkgate_con[6], BIT(6));
+               break;
        case ACLK_GMAC:
                rk_setreg(&priv->cru->clkgate_con[32], BIT(0));
                break;