Convert CONFIG_SYS_FSL_CPC et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_FSL_CPC
   CONFIG_SYS_CPC_REINIT_F

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/README b/README
index ed8e807c8f33282383a2f0cbea3cee2b81201f5a..dae467a4da0951d563b9414aeb07306bb4f737f5 100644 (file)
--- a/README
+++ b/README
@@ -371,10 +371,6 @@ The following options need to be configured:
                In this mode, a single differential clock is used to supply
                clocks to the sysclock, ddrclock and usbclock.
 
-               CONFIG_SYS_CPC_REINIT_F
-               This CONFIG is defined when the CPC is configured as SRAM at the
-               time of U-Boot entry and is required to be re-initialized.
-
 - Generic CPU options:
                CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
 

diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp
index 5971ec5df4e6ecef371879529429d5f58d8e6a02..d3ebbff43be18bee3c48c6d2b253d813297b8c89 100644 (file)
--- a/arch/Kconfig.nxp
+++ b/arch/Kconfig.nxp
@@ -16,6 +16,7 @@ config CHAIN_OF_TRUST
        select SHA_HW_ACCEL
        select SHA_PROG_HW_ACCEL
        select ENV_IS_NOWHERE
+       select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT
        select CMD_EXT4 if ARM
        select CMD_EXT4_WRITE if ARM
        imply CMD_BLOB

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 9c5b1af8b591a7b9ce1f28aab75e4256e9054f95..915e28e11088a5381a2506c885d73d90ed8599d3 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1221,6 +1221,15 @@ config SYS_BOOK3E_HV
        bool "Category E.HV is supported"
        depends on BOOKE
 
+config SYS_CPC_REINIT_F
+       bool
+       help
+         The CPC is configured as SRAM at the time of U-Boot entry and is
+         required to be re-initialized.
+
+config SYS_FSL_CPC
+       bool "Corenet Platform Cache support"
+
 config SYS_MPC85XX_NO_RESETVEC
        bool "Discard resetvec section and move bootpg section up"
        depends on MPC85xx

diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index a96a1ac5d77eaccc3949be6a9b433956f383c74d..3e707600f28fbff8a6e6d1714dca3931e70fa566 100644 (file)
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -21,9 +21,6 @@
        defined(CONFIG_TARGET_T1042D4RDB) || \
        defined(CONFIG_TARGET_T1042RDB_PI) || \
        defined(CONFIG_ARCH_T1024)
-#ifndef CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_CPC_REINIT_F
-#endif
 #undef CONFIG_SYS_INIT_L3_ADDR
 #define CONFIG_SYS_INIT_L3_ADDR                        0xbff00000
 #endif

diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 459b9e6c5443a89be8c177d6f4d78a860d23e74b..4c453a7cd9432e2795a9b0afd69e8375554afc26 100644 (file)
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 6ff6a42830693037dbde4cc27d66e3f8ec2dd709..b5f920b013e4070311ca654d55ec32a63e5836b1 100644 (file)
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index a5872faa474167fb42ec4e6fc3e92be938d5cc4b..ecf63e59c6b3bbb40a88524116a17cf525922fae 100644 (file)
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 247db8e0fef996d840d138420afef50fcfa6f76f..e609dfcbf216ec71134c2badc4279ea1bd51cdfa 100644 (file)
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 91ad3ee30515fe2557f97707ceb79c1eab04c8c9..59fdc33ad47ddf7b58acaefafe7325892e8ae010 100644 (file)
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 6ca91fe77ed27a584981fb4cfb16666cd62b3ecc..17aa980518dffe937d385c5f0f52cbc0628d3a12 100644 (file)
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 13857b8208f8af1c8dc9120d32e79bdaa74f5696..2be600a5847825e991ce7267df722da609a73342 100644 (file)
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index b587d525a266ca0910570731cbfe138fdc0e428d..f22719558fefaeb07bb264353cabaa5b0d40ab12 100644 (file)
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index c88a869bc8f1dbe070afe639763749c2d6d711a3..2aba2228947a778dfd03a777ca3a60e2c249f129 100644 (file)
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index a627475420f6977bc5b493f1dd635f6f9c7ecf42..9bfb0a88f11baea52db7069b6240832c99c51722 100644 (file)
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index 82371ea9897b489cba06817afa68edf105ede5ef..1d5f00d1c8b402b492c86a89d401884eb991b634 100644 (file)
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index be3d388484f569659327751e5effcd0686c9210b..741adc516229d216e2a095fef9903776c938411d 100644 (file)
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 4dcdb391e408080eeb4da072566254f335b8756c..c10c94849e08b768407f9f63a20d3f3bd712b2b4 100644 (file)
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 7620f4879a7985788103e773d0254391cff4f204..111ca1d4877ec6e8e3e39bec37d2dae0f7011f74 100644 (file)
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 68573a5c98211932c6d70b12aa69f4505b2d3c8f..fd94afa762f6cf9c7868bfa862d250f014412451 100644 (file)
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index d10799f83cf3bf213f9c39018f1708c5ae7d5c4c..d44f06255851124e221a311e7164ad0aa72edfb0 100644 (file)
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 22c404e27c202cae66fa10525fef298ad46cc502..fdff32c2d2d62a7201ae7089f3007057d1646ecf 100644 (file)
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -15,6 +15,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 2f1e9ca46ef5bc2f868d73a07787f27868694828..fdfbdd2ec046aaabe7a4e294de03579e19a06eb6 100644 (file)
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -17,6 +17,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 5c30e9fe37652294291c17ca487d0b08a2405ec7..9f1599fb6339ddc5a7aaa561e2c261a8f3fcc479 100644 (file)
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 00ea2175a77e59591dd8d28887e4ecf380c99c66..aca69b32160da00ba535af9cf8e6f3de8f4185d6 100644 (file)
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -13,6 +13,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y

diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index c738e9c4133e4122729371ae065cf1c95be573ad..fcf530d44f134345d71922c168b95a67a655c07d 100644 (file)
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -14,6 +14,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index bc38fa68b2f352daec870068c6b0e84fc222ae93..3e0239edf3da09b08bebdfc1110451473b582141 100644 (file)
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -16,6 +16,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index af7df9ee91c33875438ef30507fa75be30b9defa..3063157a7f66d8e53e531d2ba66463bd19fa1095 100644 (file)
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -9,6 +9,7 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index e7ce3631e0a126bcf09a6310d52da773456aa26c..8cb38f2d11f64a20ee29147a86914066918b58d4 100644 (file)
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -20,6 +20,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD

diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index a2a2c589d7cefb075fbf5b1f498b41cc9cd52d4b..5691ba5fc0965c3f0f0c3ad7c81f27ca823b7955 100644 (file)
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -21,6 +21,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 4f35dbd945f92a3dcacd47044765f23c4fcadd7b..ee7edd5af99f89f4b14b6be094fb56c857d24057 100644 (file)
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_NXP_ESBC=y
 CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
 CONFIG_PCIE1=y

diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index b02939f679ceef416ecdc78046257932aa3ea5f7..53a50514931d173bd692eeff577d5c85b5fe7df5 100644 (file)
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -23,6 +23,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======

diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 6caffde6d4e42f5dc98a0602fd6aa675c95a7ac8..5deb88da22571fdc56eeffe1f1f4e4adb4d8e1ed 100644 (file)
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -10,6 +10,7 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y

diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 4ec70d678c049be32edf1da9c016567a914340d7..4969909504a247bd06ee54eb02a47ee50404a7b9 100644 (file)
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -11,6 +11,7 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index f382288ebbb4acc68662a9bd38fc9c240f4d87bf..af66fd2013ae49f920107d36793a14502d61f86b 100644 (file)
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -17,6 +17,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD

diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 5837b3d26daf05ddb915e92be0f8f600673ff056..41956d8d3df4ad10383885bfe4fcd392c5ec4d5c 100644 (file)
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -18,6 +18,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======

diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index ab191c702f1a66217c0c13e9390dfd5218920776..0811b18fb6ef8b4f75bf6f5633dfa31007f00080 100644 (file)
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -20,6 +20,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======

diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index fff8a26b32390892e409a500369aca7a6805f30a..b8b66d41180d8607cf49f62c65bef62ced555638 100644 (file)
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -13,6 +13,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index c5ab7af33517e10b76867ffa880832678489cf50..48711c5c947845ffc42b7cd1037e13c8ed4c400c 100644 (file)
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -17,6 +17,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y

diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 83f47250094eb92ba39bc2c391833b618709f100..bd98910c0036ee876edd8a6577ec3ab893d7883d 100644 (file)
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -18,6 +18,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 <<<<<<< HEAD

diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 0c5365217eea28fc59f3eb18230938db7b5923b8..04ef733621f308ce05f55088fe5a4c22603825c9 100644 (file)
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -20,6 +20,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
 <<<<<<< HEAD

diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 66a9d5dcadb08c4b140a0802899aa2a12320f8b9..25ee845627dcbf9b68e0695834550c66cb853329 100644 (file)
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -13,6 +13,7 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_T2080RDB_REV_D=y
 <<<<<<< HEAD
 =======

diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 639cb80e8e925ea9d1373fe59d3d156dd023ab46..6141f558e7ff2cff4948c1e5680bec3a3aa5ef65 100644 (file)
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -18,6 +18,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 <<<<<<< HEAD
 =======

diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 6f403619d67211c3a238373630d9e63577d7d7a6..7fc4dc951eb41c93431e1d3e0e475132aabe7dcd 100644 (file)
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -13,6 +13,7 @@ CONFIG_TARGET_T4240RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
 CONFIG_PCIE3=y

diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 38d33c20dc99357676646c30223145cbaebbdefc..bcecb88e4d10fc2c3a4329e16a58b5d13677e4d8 100644 (file)
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -12,6 +12,7 @@ CONFIG_TARGET_KMCENT2=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
+CONFIG_SYS_FSL_CPC=y
 # CONFIG_DEEP_SLEEP is not set
 CONFIG_PCIE1=y
 CONFIG_KM_DEF_NETDEV="eth2"

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 72dd39d2306e9a7999a569888081e8c4cafb178a..27889e3033cffd8802c73dcd106226462e03820b 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -30,7 +30,6 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-#define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
 #define CONFIG_SYS_SRIO

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index a93e9d0b58ac20dde4392811cc4e248d252237cb..aa80d400bd9856fd16cdbf6c330bad4d095fba06 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -15,7 +15,6 @@
 
 /* High Level Configuration Options */
 
-#define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
 #ifdef CONFIG_RAMBOOT_PBL

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 365640dffc14bccdf01a0e7617cb68dcdc4491a8..2fb181090b5ddcb59dd1950913a86074ade06070 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -58,7 +58,6 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-#define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
 /*

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 2faec638e2ddfc7e0dc4e0fa9e145751ad033235..84dfc89481946f78827907f5fe451f5fccc2b5d6 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -22,7 +22,6 @@
 
 /* High Level Configuration Options */
 
-#define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
 
 #ifdef CONFIG_RAMBOOT_PBL

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 5ed9e1badb3b0cd5ac69250893f50ef87c7f9686..716e9c3d5566ce61c10c3da5edcf9fab54ad3a29 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -17,7 +17,6 @@
 
 /* High Level Configuration Options */
 
-#define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
 
 #ifdef CONFIG_RAMBOOT_PBL

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 96e8ff4842b4374d3f5c7f09f3b95a1baa53db08..e697d8490c942c9e4f328ca85ade09cb6002adce 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -39,7 +39,6 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-#define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
 /*

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 66bd5cb9c0fe1571760a4fb7be8c3bd45b9efcf4..d1a5d866d2d08a917eeacc0265b24463b985c13a 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -33,7 +33,6 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-#define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
 /*

diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index eafdc35c27bb9af58dc3d8d21430a4b6a8818a63..ff9d7d59a3907ac91843435f7259e6b0687014f6 100644 (file)
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -137,7 +137,6 @@
 
 #define CONFIG_RESET_VECTOR_ADDRESS    0xebfffffc
 
-#define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
 /* Environment in parallel NOR-Flash */