85xx: Add the concept of CFG_CCSRBAR_PHYS

When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.

For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/atum8548/tlb.c b/board/atum8548/tlb.c
index bb6ce761ac58c07ed804002a0be684f2cf1639b2..1ef4de41efbab706a3ec64821c26410062141de9 100644 (file)
--- a/board/atum8548/tlb.c
+++ b/board/atum8548/tlb.c
@@ -82,7 +82,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe210_0000  1M      PCI2 IO
         * 0xe300_0000  1M      PCIe IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 };

diff --git a/board/freescale/mpc8540ads/tlb.c b/board/freescale/mpc8540ads/tlb.c
index 3eaff013f613240cdd138ea92afa2832b71eb655..4fe2862f7d56ab79c44f9c7614f305b4d90e54dc 100644 (file)
--- a/board/freescale/mpc8540ads/tlb.c
+++ b/board/freescale/mpc8540ads/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe200_0000  16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/freescale/mpc8541cds/tlb.c b/board/freescale/mpc8541cds/tlb.c
index 92f759b31ba6bf31b102db973d949a13d42bff49..c5434a069f94952a6bd5aefd744e367a13299d9c 100644 (file)
--- a/board/freescale/mpc8541cds/tlb.c
+++ b/board/freescale/mpc8541cds/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe200_0000  16M     PCI1 IO
         * 0xe300_0000  16M     PCI2 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/freescale/mpc8544ds/tlb.c b/board/freescale/mpc8544ds/tlb.c
index 34cfb38f0d695d1ae2ab803d265fb5988d4248dc..61fc60986c413f3d8c3dca4e098ef6923b9aaa13 100644 (file)
--- a/board/freescale/mpc8544ds/tlb.c
+++ b/board/freescale/mpc8544ds/tlb.c
@@ -75,7 +75,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe100_0000  255M    PCI IO range
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 4, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c
index b21f71bd12be82410a8fc31036b2c1aee48ed5cb..ab99af7e1c3114294f87eab2641dda0eadbf4afb 100644 (file)
--- a/board/freescale/mpc8548cds/tlb.c
+++ b/board/freescale/mpc8548cds/tlb.c
@@ -80,7 +80,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe210_0000  1M      PCI2 IO
         * 0xe300_0000  1M      PCIe IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/freescale/mpc8555cds/tlb.c b/board/freescale/mpc8555cds/tlb.c
index 92f759b31ba6bf31b102db973d949a13d42bff49..c5434a069f94952a6bd5aefd744e367a13299d9c 100644 (file)
--- a/board/freescale/mpc8555cds/tlb.c
+++ b/board/freescale/mpc8555cds/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe200_0000  16M     PCI1 IO
         * 0xe300_0000  16M     PCI2 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/freescale/mpc8560ads/tlb.c b/board/freescale/mpc8560ads/tlb.c
index 3eaff013f613240cdd138ea92afa2832b71eb655..4fe2862f7d56ab79c44f9c7614f305b4d90e54dc 100644 (file)
--- a/board/freescale/mpc8560ads/tlb.c
+++ b/board/freescale/mpc8560ads/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe200_0000  16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/freescale/mpc8568mds/tlb.c b/board/freescale/mpc8568mds/tlb.c
index 225fc9465e17ba8dbc6db6178fc00efef753c138..a866c526c8d0d8d2842d9c271c17977f672c2dfd 100644 (file)
--- a/board/freescale/mpc8568mds/tlb.c
+++ b/board/freescale/mpc8568mds/tlb.c
@@ -74,7 +74,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe200_0000  8M      PCI1 IO
         * 0xe280_0000  8M      PCIe IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 3, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/mpc8540eval/tlb.c b/board/mpc8540eval/tlb.c
index f04123636d8c5d755acd4d6dc730c8d3ba30dd1d..1003bf61341bd142a0c54d31cbecb337c9812613 100644 (file)
--- a/board/mpc8540eval/tlb.c
+++ b/board/mpc8540eval/tlb.c
@@ -27,7 +27,7 @@
 #include <asm/mmu.h>
 
 struct fsl_e_tlb_entry tlb_table[] = {
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 1, BOOKE_PAGESZ_1M, 1),
 

diff --git a/board/pm854/tlb.c b/board/pm854/tlb.c
index 5d8753798f2782b81ffd812e42f89b10e48a2b74..a7f3813501a7d1ae8e8fc716036507ed5b382bf6 100644 (file)
--- a/board/pm854/tlb.c
+++ b/board/pm854/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe200_0000  16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/pm856/tlb.c b/board/pm856/tlb.c
index 5d8753798f2782b81ffd812e42f89b10e48a2b74..a7f3813501a7d1ae8e8fc716036507ed5b382bf6 100644 (file)
--- a/board/pm856/tlb.c
+++ b/board/pm856/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe200_0000  16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c
index 8d6625e54e2b8f7c161be7786f8ed3bdd9352629..6314005ca86789ee345917b789b4e7708fb536d3 100644 (file)
--- a/board/sbc8548/tlb.c
+++ b/board/sbc8548/tlb.c
@@ -81,7 +81,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe0000000   1M      CCSRBAR
         * 0xe2000000   16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 4, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/sbc8560/tlb.c b/board/sbc8560/tlb.c
index 155ff64bbba9c3e034c46c6ebf1689751e6e0f8f..d073399606caf8616ac9b4f91059e12bebe8008b 100644 (file)
--- a/board/sbc8560/tlb.c
+++ b/board/sbc8560/tlb.c
@@ -28,7 +28,7 @@
 
 struct fsl_e_tlb_entry tlb_table[] = {
 /* TLB for CCSRBAR (IMMR) */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 1, BOOKE_PAGESZ_1M, 1),
 

diff --git a/board/stxgp3/tlb.c b/board/stxgp3/tlb.c
index 529f230428e4e5ce78de031ad7054064e50a2d4a..d4104166a0459000ebe42393134938a4f1a36bbb 100644 (file)
--- a/board/stxgp3/tlb.c
+++ b/board/stxgp3/tlb.c
@@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe200_0000  16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/stxssa/tlb.c b/board/stxssa/tlb.c
index 46b14406d843ad5e35db28cc508f25df5192e1a3..86cbd112791a2ea8ec502bf1fdc79180f7de7fb6 100644 (file)
--- a/board/stxssa/tlb.c
+++ b/board/stxssa/tlb.c
@@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe200_0000  16M     PCI1 IO
         * 0xe300_0000  16M     PCI2 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_64M, 1),
 

diff --git a/board/tqm85xx/tlb.c b/board/tqm85xx/tlb.c
index a178cfef30f130a83282b83377db6cf65373bc72..ad26caeea2a27c3fff8c1869cb72cff72586535e 100644 (file)
--- a/board/tqm85xx/tlb.c
+++ b/board/tqm85xx/tlb.c
@@ -91,7 +91,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
         * 0xe000_0000  1M      CCSRBAR
         * 0xe200_0000  16M     PCI1 IO
         */
-       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
+       SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 6, BOOKE_PAGESZ_64M, 1),
 

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index c0ff1d5120d5237efdde7689934d6ce30f6586a2..5f02e0e21bb036354abe512298f51fd3082f9bcd 100644 (file)
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -127,12 +127,12 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
 /* We run cpu_init_early_f in AS = 1 */
 void cpu_init_early_f(void)
 {
-       set_tlb(0, CFG_CCSRBAR, CFG_CCSRBAR,
+       set_tlb(0, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
                MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                1, 0, BOOKE_PAGESZ_4K, 0);
 
        /* set up CCSR if we want it moved */
-#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
+#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR_PHYS)
        {
                u32 temp;
 
@@ -141,7 +141,7 @@ void cpu_init_early_f(void)
                        1, 1, BOOKE_PAGESZ_4K, 0);
 
                temp = in_be32((volatile u32 *)CFG_CCSRBAR_DEFAULT);
-               out_be32((volatile u32 *)CFG_CCSRBAR_DEFAULT, CFG_CCSRBAR >> 12);
+               out_be32((volatile u32 *)CFG_CCSRBAR_DEFAULT, CFG_CCSRBAR_PHYS >> 12);
 
                temp = in_be32((volatile u32 *)CFG_CCSRBAR);
        }

diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index c14376e7f4923b8429f56fed7a951bb5c22e9eb7..0d644da7ae6c300be37f656ab6bcd0814081fcca 100644 (file)
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -96,6 +96,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define PCI_SPEED              33333000        /* CPLD currenlty does not have PCI setup info */

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 5ea7b250471be1364febc4e45941181bc0443904..85934d718dff935fac48c4a5d50b5ede54e4a636 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -100,6 +100,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 

diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 174215c2cc081524b6dfcdef3bd7d367e1206dd5..77eea73787413137861655f5a62cfd1723dde58c 100644 (file)
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -83,6 +83,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default      */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR    */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR   */
 
 #define CFG_DDR_SDRAM_BASE     0x00000000      /* DDR is system memory  */

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 7334088b18fedf696512e57ec62fcee00a691b01..f1a86e69104a48b7acaf655d62e2c2e01ff3e087 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -82,6 +82,7 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 /*

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index a8942095c952fd73d6d8b336a8203c3fff58a54c..c83d9e25d906855aa835288b2d3e744bab6632c2 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -98,6 +98,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define CFG_PCI1_ADDR          (CFG_CCSRBAR+0x8000)

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index a3db9f445712f66b7bf73c07bdf96b8f9dc698b6..2d44df4546b86a867633e05e6b58982ff9cf5cca 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -96,6 +96,7 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define CFG_PCI1_ADDR  (CFG_CCSRBAR+0x8000)

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 93877aedb048dc478f5cc871eb0983e977c4eb86..fa0f7b354d79526bd206a5310f81646f0b624999 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -82,6 +82,7 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 /*

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 08884b36f07ba14cebc9f7411eaef79f5c96a8f9..e30302c5d439ff6ccad4fb4850ceda4755e454bf 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -95,6 +95,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index a12d193c712e441da160459d5b4a939fb3988f62..7bb20e58cae143923d83b9d27bb502f9fef62c75 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -90,6 +90,7 @@ extern unsigned long get_clock_freq(void);
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define CFG_PCI1_ADDR           (CFG_CCSRBAR+0x8000)

diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index 819bee70a1a5a1dac236b7f782e5c9a44de17b19..bd058fc1551097317fabd714a5529967d59e8be8 100644 (file)
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -92,6 +92,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 

diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index 8902f42ff15e482de80516c3bba723797c5beae9..38a26dc8aa682ece932dcdc55b4325c629747986 100644 (file)
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -94,6 +94,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 

diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 2bbfe9aa62b1f871438f7dbeeb26553ff3a88db9..946b3c2d8ab7117477e9dc9d2663e4d47812f031 100644 (file)
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -99,6 +99,7 @@
 #else
   #define CFG_CCSRBAR          0xff700000      /* default CCSRBAR      */
 #endif
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR   */
 
 #define CFG_DDR_SDRAM_BASE     0x00000000      /* DDR is system memory  */

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index 21e8bafc2c3d3d1efe42be38107e19a77614c2c1..fca5f74df79c16583285ebdda37b0efd74224126 100644 (file)
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -89,6 +89,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xFF700000      /* CCSRBAR Default      */
 #define CFG_CCSRBAR            0xE0000000      /* relocated CCSRBAR    */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR   */
 
 /*

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 516203a5d81ecbd9d581c431bf7e33faad88f4f4..49a72347fb7e1d929acdd11e4d8b68ca168f0ea2 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -87,6 +87,7 @@
  */
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 #define CFG_PCI1_ADDR  (CFG_CCSRBAR+0x8000)

diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index f9ede5f1879cc7b28aefcb6c0f2b8adc8eaa7fd0..81a1e072c6d93ffbf6b5688a19a9652811f7c019 100644 (file)
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -93,6 +93,7 @@
 #else
   #define CFG_CCSRBAR          0xff700000      /* default CCSRBAR      */
 #endif
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR   */
 
 #define CFG_DDR_SDRAM_BASE     0x00000000      /* DDR is system memory  */

diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 047e1cf99a304e3465cae13e1d462dee6c0deb52..fc5d0cc76a30d4bedce19f7c428746d98ed69ee8 100644 (file)
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -114,6 +114,7 @@
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default      */
 #endif
 #define CFG_CCSRBAR             0xfdf00000      /* relocated CCSRBAR    */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR   */
 
 

diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index e09dd7163f79d34e2e89616a2ab509b8e2743514..15f690af16953aa922b11242328f8cf55d7c803b 100644 (file)
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -127,6 +127,7 @@
 #define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default      */
 #endif
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR    */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR   */