]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
i2c: sun8i_rsb: Add support for DM clocks and resets
authorSamuel Holland <samuel@sholland.org>
Fri, 18 Mar 2022 04:52:36 +0000 (23:52 -0500)
committerAndre Przywara <andre.przywara@arm.com>
Mon, 4 Apr 2022 22:24:17 +0000 (23:24 +0100)
Currently, clock/reset setup for this device is handled by a
platform-specific function and is intermixed with non-DM pinctrl
setup. Use the devicetree to get clocks/resets, which disentagles
it from the pinctrl setup in preparation for moving to DM_PINCTRL.

This also has the added benefit of picking the right clock/reset
bits for H6 and new SoCs that have a rearranged PRCM MMIO space.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
drivers/i2c/sun8i_rsb.c

index 38d6e87577da6e0f3fb0a158610367fa2d56b392..47fa05b6d1cc594904f46b394966693f567efde9 100644 (file)
@@ -9,10 +9,12 @@
  */
 
 #include <axp_pmic.h>
+#include <clk.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <reset.h>
 #include <time.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/gpio.h>
@@ -235,9 +237,19 @@ static int sun8i_rsb_probe_chip(struct udevice *bus, uint chip_addr,
 static int sun8i_rsb_probe(struct udevice *bus)
 {
        struct sun8i_rsb_priv *priv = dev_get_priv(bus);
+       struct reset_ctl *reset;
+       struct clk *clk;
 
        priv->base = dev_read_addr_ptr(bus);
 
+       reset = devm_reset_control_get(bus, NULL);
+       if (!IS_ERR(reset))
+               reset_deassert(reset);
+
+       clk = devm_clk_get(bus, NULL);
+       if (!IS_ERR(clk))
+               clk_enable(clk);
+
        return sun8i_rsb_init(priv->base);
 }