]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
riscv: ae350: Fix XIP config boot failure
authorLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 1 Jun 2022 02:01:49 +0000 (10:01 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 11 Aug 2022 10:46:07 +0000 (18:46 +0800)
The booting flow is SPL -> OpenSBI -> U-Boot.
The boot hart may change after OpenSBI and may not always be hart0,
so wrap the related branch instruction with M-MODE.

Current DTB setup for XIP is not valid.
There is no chance for CONFIG_SYS_FDT_BASE, the DTB address used
in XIP mode, to be returned. Fix this.

Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/cpu/start.S
board/AndesTech/ax25-ae350/ax25-ae350.c

index ac81783a902da7de4deb72e980531681b7ca4efb..b7f21ab63e00cbd117def75ca5a122a2e67fccd2 100644 (file)
@@ -140,9 +140,11 @@ call_harts_early_init:
         * accesses gd).
         */
        mv      gp, s0
+#if CONFIG_IS_ENABLED(RISCV_MMODE)
        bnez    tp, secondary_hart_loop
 #endif
-
+#endif
+       
        mv      a0, s0
        jal     board_init_f_init_reserve
 
index d6a4291379d7a35d101113bcdc873d111c4e3608..36f0dd4b0fdd3afb1a58d809e7449b064b988f40 100644 (file)
@@ -54,17 +54,22 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
        return 0;
 }
 
+#define ANDES_HW_DTB_ADDRESS   0xF2000000
 void *board_fdt_blob_setup(int *err)
 {
        *err = 0;
-#if defined(CONFIG_OF_BOARD)
-       return (void *)(ulong)gd->arch.firmware_fdt_addr;
-#elif defined(CONFIG_OF_SEPARATE)
-       return (void *)CONFIG_SYS_FDT_BASE;
-#else
+
+       if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
+               if (gd->arch.firmware_fdt_addr)
+                       return (void *)(ulong)gd->arch.firmware_fdt_addr;
+       }
+
+       if (fdt_magic(CONFIG_SYS_FDT_BASE) == FDT_MAGIC)
+               return (void *)CONFIG_SYS_FDT_BASE;
+       return (void *)ANDES_HW_DTB_ADDRESS;
+
        *err = -EINVAL;
        return NULL;
-#endif
 }
 
 int smc_init(void)