Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz.
This information is undocumented in public Marvell Kirkwood Functional
Specifications [2], but is available in Linux v3.15 kirkwood code [1].
Commit
8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK")
broke support for Marvell
88F6281 SoCs because it was expected that all
those SoCs have TCLK running at 200 MHz as specified in Marvell
88F6281
Hardware Specifications [3].
Fix broken support for
88F6281 by detecting CONFIG_SYS_TCLK from SAR
register, like it was doing Linux v3.15.
[1] - https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542
[2] - https://web.archive.org/web/
20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf
[3] - https://web.archive.org/web/
20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
Update by Stefan 2022-08-23:
- Fix compilation error for ds109
Fixes: 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
/* TCLK Core Clock definition */
-#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
+#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(21)) ? \
+ 166666667 : 200000000)
#endif /* _ASM_ARCH_KW88F6281_H */
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
+#define CONFIG_SAR_REG (KW_MPP_BASE + 0x0030)
+
#if defined (CONFIG_KW88F6281)
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)
#include <miiphy.h>
#include <net.h>
#include <asm/global_data.h>
+#include <asm/io.h>
#include <asm/setup.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>