imx: correct HAB status for new chip TO

According to:

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0

ENGR00287268 mx6: fix the secure boot issue on the new tapout chip
commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b

newer i.MX6 silicon revisions have an updated ROM and HAB API table.
Please see also:

i.MX Applications Processors Documentation
Engineering Bulletins
EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison

With this change the secure boot status is correctly displayed

Signed-off-by: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/cpu/armv7/mx6/hab.c b/arch/arm/cpu/armv7/mx6/hab.c
index 51877753652dfdda1880aef7c598a3adb8e23951..f6810a680d9f59493bb041ca79c3050fc5a59f9d 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/hab.c
+++ b/arch/arm/cpu/armv7/mx6/hab.c
@@ -7,15 +7,69 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hab.h>
+#include <asm/arch/sys_proto.h>
 
 /* -------- start of HAB API updates ------------*/
-#define hab_rvt_report_event ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)
-#define hab_rvt_report_status ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)
-#define hab_rvt_authenticate_image \
-       ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)
-#define hab_rvt_entry ((hab_rvt_entry_t *)HAB_RVT_ENTRY)
-#define hab_rvt_exit ((hab_rvt_exit_t *)HAB_RVT_EXIT)
-#define hab_rvt_clock_init HAB_RVT_CLOCK_INIT
+
+#define hab_rvt_report_event_p                                 \
+(                                                              \
+       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
+         is_cpu_type(MXC_CPU_MX6D)) &&                         \
+         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
+       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
+       ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)        \
+)
+
+#define hab_rvt_report_status_p                                        \
+(                                                              \
+       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
+         is_cpu_type(MXC_CPU_MX6D)) &&                         \
+         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
+       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
+       ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)      \
+)
+
+#define hab_rvt_authenticate_image_p                           \
+(                                                              \
+       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
+         is_cpu_type(MXC_CPU_MX6D)) &&                         \
+         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
+       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
+       ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)    \
+)
+
+#define hab_rvt_entry_p                                                \
+(                                                              \
+       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
+         is_cpu_type(MXC_CPU_MX6D)) &&                         \
+         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
+       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
+       ((hab_rvt_entry_t *)HAB_RVT_ENTRY)                      \
+)
+
+#define hab_rvt_exit_p                                         \
+(                                                              \
+       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
+         is_cpu_type(MXC_CPU_MX6D)) &&                         \
+         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
+       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
+       ((hab_rvt_exit_t *)HAB_RVT_EXIT)                        \
+)
 
 bool is_hab_enabled(void)
 {
@@ -52,6 +106,11 @@ int get_hab_status(void)
        size_t bytes = sizeof(event_data); /* Event size in bytes */
        enum hab_config config = 0;
        enum hab_state state = 0;
+       hab_rvt_report_event_t *hab_rvt_report_event;
+       hab_rvt_report_status_t *hab_rvt_report_status;
+
+       hab_rvt_report_event = hab_rvt_report_event_p;
+       hab_rvt_report_status = hab_rvt_report_status_p;
 
        if (is_hab_enabled())
                puts("\nSecure boot enabled\n");

diff --git a/arch/arm/include/asm/arch-mx6/hab.h b/arch/arm/include/asm/arch-mx6/hab.h
index d724f206f06b65a9ecb0c3673865494d82f42c1e..1f12695f67f863994bff9ddefb8a74c691faf4eb 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/hab.h
+++ b/arch/arm/include/asm/arch-mx6/hab.h
@@ -53,12 +53,17 @@ typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t,
                void **, size_t *, hab_loader_callback_f_t);
 typedef void hapi_clock_init_t(void);
 
-#define HAB_RVT_REPORT_EVENT (*(uint32_t *)0x000000B4)
-#define HAB_RVT_REPORT_STATUS (*(uint32_t *)0x000000B8)
-#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *)0x000000A4)
-#define HAB_RVT_ENTRY (*(uint32_t *)0x00000098)
-#define HAB_RVT_EXIT (*(uint32_t *)0x0000009C)
-#define HAB_RVT_CLOCK_INIT ((hapi_clock_init_t *)0x0000024D)
+#define HAB_RVT_REPORT_EVENT                   (*(uint32_t *)0x000000B4)
+#define HAB_RVT_REPORT_STATUS                  (*(uint32_t *)0x000000B8)
+#define HAB_RVT_AUTHENTICATE_IMAGE             (*(uint32_t *)0x000000A4)
+#define HAB_RVT_ENTRY                          (*(uint32_t *)0x00000098)
+#define HAB_RVT_EXIT                           (*(uint32_t *)0x0000009C)
+
+#define HAB_RVT_REPORT_EVENT_NEW               (*(uint32_t *)0x000000B8)
+#define HAB_RVT_REPORT_STATUS_NEW              (*(uint32_t *)0x000000BC)
+#define HAB_RVT_AUTHENTICATE_IMAGE_NEW         (*(uint32_t *)0x000000A8)
+#define HAB_RVT_ENTRY_NEW                      (*(uint32_t *)0x0000009C)
+#define HAB_RVT_EXIT_NEW                       (*(uint32_t *)0x000000A0)
 
 #define HAB_CID_ROM 0 /**< ROM Caller ID */
 #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 1f19727b581bd7c08b6141ec4d37bac4d8fb6c3c..a69a7530c37b9aff9806af489f3f6cd76ed1061b 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -217,6 +217,8 @@
 #define IP2APB_USBPHY2_BASE_ADDR    (AIPS2_OFF_BASE_ADDR + 0x7C000)
 
 #define CHIP_REV_1_0                 0x10
+#define CHIP_REV_1_2                 0x12
+#define CHIP_REV_1_5                 0x15
 #define IRAM_SIZE                    0x00040000
 #define FEC_QUIRK_ENET_MAC
 

diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index 38851a135c8a5bf4686226ed715cf3d3ad791e4d..42d30f50212f62430357740a3eeb6b167e412a4b 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -11,7 +11,9 @@
 #include <asm/imx-common/regs-common.h>
 #include "../arch-imx/cpu.h"
 
-#define is_soc_rev(rev)        ((get_cpu_rev() & 0xFF) - rev)
+#define soc_rev() (get_cpu_rev() & 0xFF)
+#define is_soc_rev(rev)        (soc_rev() - rev)
+
 u32 get_cpu_rev(void);
 
 /* returns MXC_CPU_ value */