x86: coreboot: Control I/O port 0xb2 writing via device tree

Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes
U-Boot to hang on QEMU q35 target. We introduce a config option in the
device tree "u-boot,no-apm-finalize" under /config node if we don't want
to do that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index c3dfd28fffcac69ace0ce84aabf8de93c80790dd..c4cac045b2906df2a556675b286a229a5bde6765 100644 (file)
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/msr.h>
@@ -74,9 +75,14 @@ void board_final_cleanup(void)
                mtrr_close(&state);
        }
 
-       /* Issue SMI to Coreboot to lock down ME and registers */
-       printf("Finalizing Coreboot\n");
-       outb(0xcb, 0xb2);
+       if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+               /*
+                * Issue SMI to coreboot to lock down ME and registers
+                * when allowed via device tree
+                */
+               printf("Finalizing coreboot\n");
+               outb(0xcb, 0xb2);
+       }
 }
 
 int misc_init_r(void)

diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 6c89283bd68695b8ebd11cb530ea6f295fd121cc..02a483cd37aa2d02f4edec07e6e83a8140017b5e 100644 (file)
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -15,6 +15,7 @@
 
        config {
                silent_console = <0>;
+               u-boot,no-apm-finalize;
        };
 
        chosen {