powerpc/corenet: Move RCW print to cpu.c

The RCW print is common for all corenet platforms. Not necessary to ducplicate
in each board file.

Signed-off-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 91ac4ee617b6fc51e9e1b95358a5df5825e1700d..66bc6a2ea362725f25a9bdedc131a7a98fec1dc8 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -44,10 +44,10 @@ int checkcpu (void)
        uint major, minor;
        struct cpu_type *cpu;
        char buf1[32], buf2[32];
-#if (defined(CONFIG_DDR_CLK_FREQ) || \
-       defined(CONFIG_FSL_CORENET)) && !defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
-       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#endif /* CONFIG_FSL_CORENET */
+#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
+       ccsr_gur_t __iomem *gur =
+               (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+#endif
 
        /*
         * Cornet platforms use ddr sync bit in RCW to indicate sync vs async
@@ -211,6 +211,21 @@ int checkcpu (void)
 
        puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");
 
+#ifdef CONFIG_FSL_CORENET
+       /* Display the RCW, so that no one gets confused as to what RCW
+        * we're actually using for this boot.
+        */
+       puts("Reset Configuration Word (RCW):");
+       for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
+               u32 rcw = in_be32(&gur->rcwsr[i]);
+
+               if ((i % 4) == 0)
+                       printf("\n       %08x:", i * 4);
+               printf(" %08x", rcw);
+       }
+       puts("\n");
+#endif
+
        return 0;
 }
 

diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index 86e44eae0bd973618b7d672256109087f9f6717d..e4f4bfdc5b1bd35d422cd01cf45f9c6d04e8875b 100644 (file)
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -35,8 +35,6 @@ int checkboard(void)
        char buf[64];
        u8 sw;
        struct cpu_type *cpu = gd->arch.cpu;
-       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
-       unsigned int i;
        static const char *const freq[] = {"100", "125", "156.25", "161.13",
                                                "122.88", "122.88", "122.88"};
        int clock;
@@ -61,19 +59,6 @@ int checkboard(void)
        /* the timestamp string contains "\n" at the end */
        printf(" on %s", qixis_read_time(buf));
 
-       /* Display the RCW, so that no one gets confused as to what RCW
-        * we're actually using for this boot.
-        */
-       puts("Reset Configuration Word (RCW):");
-       for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
-               u32 rcw = in_be32(&gur->rcwsr[i]);
-
-               if ((i % 4) == 0)
-                       printf("\n       %08x:", i * 4);
-               printf(" %08x", rcw);
-       }
-       puts("\n");
-
        /*
         * Display the actual SERDES reference clocks as configured by the
         * dip switches on the board.  Note that the SWx registers could

diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index fffb0c817a3261a46b5e5bc29c84a31aea337715..60e2100af3089144759b42f6ed66d82bc15ae96c 100644 (file)
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -27,8 +27,10 @@ int checkboard (void)
 {
        u8 sw;
        struct cpu_type *cpu = gd->arch.cpu;
-       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) || \
+       defined(CONFIG_P5040DS)
        unsigned int i;
+#endif
        static const char * const freq[] = {"100", "125", "156.25", "212.5" };
 
        printf("Board: %sDS, ", cpu->name);
@@ -47,19 +49,6 @@ int checkboard (void)
        else
                printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
 
-       /* Display the RCW, so that no one gets confused as to what RCW
-        * we're actually using for this boot.
-        */
-       puts("Reset Configuration Word (RCW):");
-       for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
-               u32 rcw = in_be32(&gur->rcwsr[i]);
-
-               if ((i % 4) == 0)
-                       printf("\n       %08x:", i * 4);
-               printf(" %08x", rcw);
-       }
-       puts("\n");
-
        /* Display the actual SERDES reference clocks as configured by the
         * dip switches on the board.  Note that the SWx registers could
         * technically be set to force the reference clocks to match the

diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 08d10bc9c832f0e5b60532ed18e6c0b310a24484..60694a6723d1cb7c79edf4b6c6ff8747de91a361 100644 (file)
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -28,7 +28,6 @@ int checkboard(void)
 {
        u8 sw;
        struct cpu_type *cpu = gd->arch.cpu;
-       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
        unsigned int i;
 
        printf("Board: %sRDB, ", cpu->name);
@@ -38,20 +37,6 @@ int checkboard(void)
        sw = CPLD_READ(fbank_sel);
        printf("vBank: %d\n", sw & 0x1);
 
-       /*
-        * Display the RCW, so that no one gets confused as to what RCW
-        * we're actually using for this boot.
-        */
-       puts("Reset Configuration Word (RCW):");
-       for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
-               u32 rcw = in_be32(&gur->rcwsr[i]);
-
-               if ((i % 4) == 0)
-                       printf("\n       %08x:", i * 4);
-               printf(" %08x", rcw);
-       }
-       puts("\n");
-
        /*
         * Display the actual SERDES reference clocks as configured by the
         * dip switches on the board.  Note that the SWx registers could

diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index aa6a217f39dd52440feff393d06590ad3a3e4473..fe2a9982a90f97338ffc6affc8a5412a5bb563b1 100644 (file)
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -43,7 +43,6 @@ int checkboard(void)
        char buf[64];
        u8 sw;
        struct cpu_type *cpu = gd->arch.cpu;
-       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
        unsigned int i;
 
        printf("Board: %sQDS, ", cpu->name);
@@ -68,19 +67,6 @@ int checkboard(void)
        /* the timestamp string contains "\n" at the end */
        printf(" on %s", qixis_read_time(buf));
 
-       /* Display the RCW, so that no one gets confused as to what RCW
-        * we're actually using for this boot.
-        */
-       puts("Reset Configuration Word (RCW):");
-       for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
-               u32 rcw = in_be32(&gur->rcwsr[i]);
-
-               if ((i % 4) == 0)
-                       printf("\n       %08x:", i * 4);
-               printf(" %08x", rcw);
-       }
-       puts("\n");
-
        /*
         * Display the actual SERDES reference clocks as configured by the
         * dip switches on the board.  Note that the SWx registers could