config CM926EJ_S
bool "Core Module for ARM926EJ-STM"
select CPU_ARM926EJS
+ select CM_TCRAM
config CM946ES
bool "Core Module for ARM946E-STM"
select CPU_ARM946ES
+ select CM_MULTIPLE_SSRAM
+ select CM_TCRAM
config CM1136
bool "Core Module for ARM1136JF-STM"
select CPU_ARM1136
+ select CM_TCRAM
endchoice
config SYS_MALLOC_F_LEN
default 0x2000
+config CM_INIT
+ def_bool y
+
+config CM_REMAP
+ def_bool y
+
+config CM_SPD_DETECT
+ def_bool y
+
+config CM_MULTIPLE_SSRAM
+ bool
+
+config CM_TCRAM
+ bool
+
endmenu
#include <init.h>
#include <net.h>
#include <netdev.h>
+#include <armcoremodule.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm/platform_data/serial_pl01x.h>
*/
#include <config.h>
+#include <armcoremodule.h>
/* Reset using CM control register */
.global reset_cpu
/* set the desired CM specific value */
mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */
-#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
- orr r2,r2,#CMMASK_INIT_102
-#else
-
#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
!defined (CONFIG_CM940T)
#endif /* CMxx6 code */
-#endif /* ARM102xxE value */
-
/* read CM_INIT */
mov r0, #CM_BASE
ldr r1, [r0, #OS_INIT]
/* CM926EJ-S */
/* CM1136-EJ-S */
-#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
-#define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual */
- /* - PLL test clock bypassed */
- /* - bus clock ratio 2 */
- /* - little endian */
- /* - vectors at zero */
-#endif /* CM1022xx */
-
-/* Determine CM characteristics */
-
-#undef CONFIG_CM_MULTIPLE_SSRAM
-#undef CONFIG_CM_SPD_DETECT
-#undef CONFIG_CM_REMAP
-#undef CONFIG_CM_INIT
-#undef CONFIG_CM_TCRAM
-
-#if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S)
-#define CONFIG_CM_MULTIPLE_SSRAM /* CM has multiple SSRAM mapping */
-#endif
-
-/* Excalibur core module has reduced functionality */
-#ifndef CONFIG_CM922T_XA10
-#define CONFIG_CM_SPD_DETECT /* CM supports SPD query */
-#define OS_SPD 0x00000100 /* Address of SPD data */
-#define CONFIG_CM_REMAP /* CM supports remapping */
-#define CONFIG_CM_INIT /* CM has initialization reg */
-#endif /* NOT EXCALIBUR */
-
-#if defined(CONFIG_CM926EJ_S) || defined (CONFIG_CM946E_S) || \
- defined(CONFIG_CM966E_S) || defined (CONFIG_CM1026EJ_S) || \
- defined(CONFIG_CM1136JF_S)
-#define CONFIG_CM_TCRAM /* CM has TCRAM */
-#endif
-
-#ifdef CONFIG_CM_SPD_DETECT
#define OS_SPD 0x00000100 /* The SDRAM SPD data is copied here */
-#endif
#endif /* __ARMCOREMODULE_H */
#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
-/*
- * There are various dependencies on the core module (CM) fitted
- * Users should refer to their CM user guide
- */
-#include "armcoremodule.h"
-
-/*
- * Initialize and remap the core module, use SPD to detect memory size
- * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
- * the core module has a CM_INIT register
- * then the U-Boot initialisation code will
- * e.g. ARM Boot Monitor or pre-loader is repeated once
- * (to re-initialise any existing CM_INIT settings to safe values).
- *
- * This is usually not the desired behaviour since the platform
- * will either reboot into the ARM monitor (or pre-loader)
- * or continuously cycle thru it without U-Boot running,
- * depending upon the setting of Integrator/CP switch S2-4.
- *
- * However it may be needed if Integrator/CP switch S2-1
- * is set OFF to boot direct into U-Boot.
- * In that case comment out the line below.
- */
-#define CONFIG_CM_INIT
-#define CONFIG_CM_REMAP
-#define CONFIG_CM_SPD_DETECT
-
/*
* The ARM boot monitor initializes the board.
* However, the default U-Boot code also performs the initialization.
* PCI definitions
*/
-/*-----------------------------------------------------------------------
- * There are various dependencies on the core module (CM) fitted
- * Users should refer to their CM user guide
- * - when porting adjust u-boot/Makefile accordingly
- * to define the necessary CONFIG_ s for the CM involved
- * see e.g. integratorcp_CM926EJ-S_config
- */
-#include "armcoremodule.h"
-
#endif /* __CONFIG_H */