]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
dt-bindings: prci: add indexes for reset signals available in prci
authorSagar Shrikant Kadam <sagar.kadam@sifive.com>
Wed, 29 Jul 2020 09:36:10 +0000 (02:36 -0700)
committerAndes <uboot@andestech.com>
Tue, 4 Aug 2020 01:19:41 +0000 (09:19 +0800)
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
include/dt-bindings/reset/sifive-fu540-prci.h [new file with mode: 0644]

diff --git a/include/dt-bindings/reset/sifive-fu540-prci.h b/include/dt-bindings/reset/sifive-fu540-prci.h
new file mode 100644 (file)
index 0000000..89aa5b6
--- /dev/null
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Sifive, Inc.
+ * Author: Sagar Kadam <sagar.kadam@sifive.com>
+ */
+
+#ifndef __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
+#define __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
+
+/* Reset indexes for use by device tree data and the PRCI driver */
+#define PRCI_RST_DDR_CTRL_N    0
+#define PRCI_RST_DDR_AXI_N     1
+#define PRCI_RST_DDR_AHB_N     2
+#define PRCI_RST_DDR_PHY_N     3
+/* bit 4 is reserved bit */
+#define PRCI_RST_RSVD_N                4
+#define PRCI_RST_GEMGXL_N      5
+
+#endif