armv8: fsl-layerscape: add missing sec jr base address defines

Add defines for all the SEC job rings base addresses.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index ee9b33becf080d4a70e5cd9b6fc13960a473b34d..7cd5333ff440a34dd64603bb7054ddc8cb5ba687 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -89,10 +89,18 @@
 /* SEC */
 #define CONFIG_SYS_FSL_SEC_OFFSET              0x07000000ull
 #define CONFIG_SYS_FSL_JR0_OFFSET              0x07010000ull
+#define FSL_SEC_JR0_OFFSET                     CONFIG_SYS_FSL_JR0_OFFSET
+#define FSL_SEC_JR1_OFFSET                     0x07020000ull
+#define FSL_SEC_JR2_OFFSET                     0x07030000ull
+#define FSL_SEC_JR3_OFFSET                     0x07040000ull
 #define CONFIG_SYS_FSL_SEC_ADDR \
        (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
 #define CONFIG_SYS_FSL_JR0_ADDR \
        (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
+#define FSL_SEC_JR0_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR0_OFFSET)
+#define FSL_SEC_JR1_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR1_OFFSET)
+#define FSL_SEC_JR2_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR2_OFFSET)
+#define FSL_SEC_JR3_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR3_OFFSET)
 
 #ifdef CONFIG_TFABOOT
 #ifdef CONFIG_NXP_LSCH3_2