]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
powerpc/85xx: fix compatible property for the L2 cache node
authorTimur Tabi <timur@freescale.com>
Fri, 29 Apr 2011 23:08:44 +0000 (18:08 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 13 May 2011 05:36:11 +0000 (00:36 -0500)
The compatible property for the L2 cache node (on 85xx systems that don't
have a CPC) was using a value for the property length that did not match
the actual length of the property.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc85xx/fdt.c

index 6e909b52d0ea775725e31025a10ede74e401f6e7..97d3928e1d5124f908c543a9bfe90ad0e9c8f063 100644 (file)
@@ -165,7 +165,6 @@ static inline void ft_fixup_l2cache(void *blob)
        int len, off;
        u32 *ph;
        struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
-       char compat_buf[38];
 
        const u32 line_size = 32;
        const u32 num_ways = 8;
@@ -192,22 +191,32 @@ static inline void ft_fixup_l2cache(void *blob)
        }
 
        if (cpu) {
-               if (isdigit(cpu->name[0]))
-                       len = sprintf(compat_buf,
-                               "fsl,mpc%s-l2-cache-controller", cpu->name);
-               else
-                       len = sprintf(compat_buf,
-                               "fsl,%c%s-l2-cache-controller",
-                               tolower(cpu->name[0]), cpu->name + 1);
+               char buf[40];
+
+               if (isdigit(cpu->name[0])) {
+                       /* MPCxxxx, where xxxx == 4-digit number */
+                       len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
+                               cpu->name) + 1;
+               } else {
+                       /* Pxxxx or Txxxx, where xxxx == 4-digit number */
+                       len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
+                               tolower(cpu->name[0]), cpu->name + 1) + 1;
+               }
+
+               /*
+                * append "cache" after the NULL character that the previous
+                * sprintf wrote.  This is how a device tree stores multiple
+                * strings in a property.
+                */
+               len += sprintf(buf + len, "cache") + 1;
 
-               sprintf(&compat_buf[len + 1], "cache");
+               fdt_setprop(blob, off, "compatible", buf, len);
        }
        fdt_setprop(blob, off, "cache-unified", NULL, 0);
        fdt_setprop_cell(blob, off, "cache-block-size", line_size);
        fdt_setprop_cell(blob, off, "cache-size", size);
        fdt_setprop_cell(blob, off, "cache-sets", num_sets);
        fdt_setprop_cell(blob, off, "cache-level", 2);
-       fdt_setprop(blob, off, "compatible", compat_buf, sizeof(compat_buf));
 
        /* we dont bother w/L3 since no platform of this type has one */
 }