On LWMON we must use the watchdog to reset the board as the CPU

genereated HRESET pulse is too short to reset the external circuitry.

diff --git a/CHANGELOG b/CHANGELOG
index bcadd5987377652dab31d81c93df5672bd4763a5..dbede2691da2ff9c5767658619105f2943820fa0 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,10 @@
 Changes for U-Boot 1.1.3:
 ======================================================================
 
+* On LWMON we must use the watchdog to reset the board as the CPU
+  genereated HRESET pulse is too short to reset the external
+  circuitry.
+
 * Add test tool to exercise SDRAM accesses in burst mode
   (as standalone program, MPC8xx/PowerPC only)
 

diff --git a/Makefile b/Makefile
index e4cc65599ad1729649a9c925ae4f6b03052da6dd..8659fd0a9b43d1a5aca0910691cf44306d036dc7 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1651,7 +1651,8 @@ clean:
                | xargs rm -f
        rm -f examples/hello_world examples/timer \
              examples/eepro100_eeprom examples/sched \
-             examples/mem_to_mem_idma2intr examples/82559_eeprom
+             examples/mem_to_mem_idma2intr examples/82559_eeprom \
+             examples/test_burst
        rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
        rm -f tools/mpc86x_clk tools/ncb
        rm -f tools/easylogo/easylogo tools/bmp_logo

diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c
index 5f92a371b0f4696a3a5fff9a4fd12d5b6bc11c54..4a32986a2e7c0cc33414acdb9d19f1031b7e96cb 100644 (file)
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -463,6 +463,8 @@ void upmconfig (uint upm, uint * table, uint size)
 
 /* ------------------------------------------------------------------------- */
 
+#ifndef CONFIG_LWMON
+
 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
        ulong msr, addr;
@@ -497,6 +499,32 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
        return 1;
 }
 
+#else  /* CONFIG_LWMON */
+
+/*
+ * On the LWMON board, the MCLR reset input of the PIC's on the board
+ * uses a 47K/1n RC combination which has a 47us time  constant.  The
+ * low  signal on the HRESET pin of the CPU is only 512 clocks = 8 us
+ * and thus too short to reset the external hardware. So we  use  the
+ * watchdog to reset the board.
+ */
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       /* prevent triggering the watchdog */
+       disable_interrupts ();
+
+       /* make sure the watchdog is running */
+       reset_8xx_watchdog ((immap_t *) CFG_IMMR);
+
+       /* wait for watchdog reset */
+       while (1) {};
+
+       /* NOTREACHED */
+       return 1;
+}
+
+#endif /* CONFIG_LWMON */
+
 /* ------------------------------------------------------------------------- */
 
 /*
@@ -558,6 +586,9 @@ void watchdog_reset (void)
        if (re_enable)
                enable_interrupts ();
 }
+#endif /* CONFIG_WATCHDOG */
+
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_LWMON)
 
 void reset_8xx_watchdog (volatile immap_t * immr)
 {