powerpc: Enable device tree support for P1020RDB

Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index f0d49aa31cf6a662fdd2f6a7176078e8e6e8bbeb..3a806bdddfdc1a7319f7559c29bc3536c474a71d 100644 (file)
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 
+dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
+dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
 dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
 dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
 dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb

diff --git a/arch/powerpc/dts/e500v2_power_isa.dtsi b/arch/powerpc/dts/e500v2_power_isa.dtsi
new file mode 100644 (file)
index 0000000..010e8e5
--- /dev/null
+++ b/arch/powerpc/dts/e500v2_power_isa.dtsi
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * e500v2 Power ISA Device Tree Source (include)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/ {
+       cpus {
+               power-isa-version = "2.03";
+               power-isa-b;            // Base
+               power-isa-e;            // Embedded
+               power-isa-atb;          // Alternate Time Base
+               power-isa-cs;           // Cache Specification
+               power-isa-e.le;         // Embedded.Little-Endian
+               power-isa-e.pm;         // Embedded.Performance Monitor
+               power-isa-ecl;          // Embedded Cache Locking
+               power-isa-mmc;          // Memory Coherence
+               power-isa-sp;           // Signal Processing Engine
+               power-isa-sp.fd;        // SPE.Embedded Float Scalar Double
+               power-isa-sp.fs;        // SPE.Embedded Float Scalar Single
+               power-isa-sp.fv;        // SPE.Embedded Float Vector
+               mmu-type = "power-embedded";
+       };
+};

diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi
new file mode 100644 (file)
index 0000000..e1a4f50
--- /dev/null
+++ b/arch/powerpc/dts/p1020-post.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+&soc {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       device_type = "soc";
+       compatible = "fsl,p1020-immr", "simple-bus";
+       bus-frequency = <0x0>;
+
+       mpic: pic@40000 {
+               interrupt-controller;
+               #address-cells = <0>;
+               #interrupt-cells = <4>;
+               reg = <0x40000 0x40000>;
+               compatible = "fsl,mpic";
+               device_type = "open-pic";
+               big-endian;
+               single-cpu-affinity;
+               last-interrupt-source = <255>;
+       };
+};

diff --git a/arch/powerpc/dts/p1020.dtsi b/arch/powerpc/dts/p1020.dtsi
new file mode 100644 (file)
index 0000000..ee2b6f4
--- /dev/null
+++ b/arch/powerpc/dts/p1020.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: PowerPC,P1020@0 {
+                       device_type = "cpu";
+                       reg = <0>;
+               };
+               cpu1: PowerPC,P1020@1 {
+                       device_type = "cpu";
+                       reg = <1>;
+               };
+       };
+};

diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts
new file mode 100644 (file)
index 0000000..fd68b8b
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020RDB-PC Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p1020.dtsi"
+
+/ {
+       model = "fsl,P1020RDB-PC";
+       compatible = "fsl,P1020RDB-PC";
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       soc: soc@ffe00000 {
+               ranges = <0x0 0x0 0xffe00000 0x100000>;
+       };
+};
+
+/include/ "p1020-post.dtsi"

diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts
new file mode 100644 (file)
index 0000000..a23d031
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020RDB-PC (36-bit address map) Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p1020.dtsi"
+
+/ {
+       model = "fsl,P1020RDB-PC";
+       compatible = "fsl,P1020RDB-PC";
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       soc: soc@fffe00000 {
+               ranges = <0x0 0xf 0xffe00000 0x100000>;
+       };
+};
+
+/include/ "p1020-post.dtsi"

diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts
new file mode 100644 (file)
index 0000000..81f25a3
--- /dev/null
+++ b/arch/powerpc/dts/p1020rdb-pd.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1020RDB-PD Device Tree Source
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2019 NXP
+ */
+
+/include/ "p1020.dtsi"
+
+/ {
+       model = "fsl,P1020RDB-PD";
+       compatible = "fsl,P1020RDB-PD";
+       #address-cells = <2>;
+       #size-cells = <2>;
+       interrupt-parent = <&mpic>;
+
+       soc: soc@ffe00000 {
+               ranges = <0x0 0x0 0xffe00000 0x100000>;
+       };
+};
+
+/include/ "p1020-post.dtsi"

diff --git a/board/freescale/p1_p2_rdb_pc/README b/board/freescale/p1_p2_rdb_pc/README
index f4cc43fbfac130dcc4d58d9817980d23b5678210..26902ded8d50dba3515acba408600b86b24ae1e5 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/README
+++ b/board/freescale/p1_p2_rdb_pc/README
@@ -45,3 +45,22 @@ enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
 
 'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
 'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.
+
+Device tree support and how to enable it for different configs
+--------------------------------------------------------------
+Device tree support is available for p1020rdb for below mentioned boot,
+1. NOR Boot
+2. NAND Boot
+3. SD Boot
+4. SPIFLASH Boot
+
+To enable device tree support for other boot, below configs need to be
+enabled in relative defconfig file,
+1. CONFIG_DEFAULT_DEVICE_TREE="p1020rdb" (Change default device tree name if required)
+2. CONFIG_OF_CONTROL
+3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
+   CONFIG_RESET_VECTOR_ADDRESS - 0xffc
+
+If device tree support is enabled in defconfig,
+1. use 'u-boot-with-dtb.bin' for NOR boot.
+2. use 'u-boot-with-spl.bin' for other boot.

diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index e4c565e2447aa762026089a55b8382e3b1a4a562..dde2e1863a86acc261b1b9f05ab8ed4d4e34c675 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -42,6 +42,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -63,4 +65,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 0d92bb2af2c20f0e4cbd37d2d946d96979972ffb..9f956c65905db9a636162b41e3a3216837c15dbd 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -38,6 +38,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -58,4 +60,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 95000db775dbaaa772bfc143f9c00f1aa82bec1f..78aaf49ca6580a5590e4a63c2de9e0ae4a030750 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -39,6 +39,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -59,4 +61,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 8ada9bbf3820edd69d360edb63edd4a227ceb302..8d7efd773e2f45096af2fc8d82e8c547390ed7ed 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -26,6 +27,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -46,4 +49,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 2ea2f00e934aae1cd9079b964934a202bbb0c3d7..0eb4bdd2d42c805a8803d2eff3e0c67d5b1c96ad 100644 (file)
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -41,6 +41,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -62,4 +64,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index a139fe87690367f7c4f5875c05eda565ff3fb383..6a31d8aa16199be85c9afaa39611efc0c71f9a75 100644 (file)
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -37,6 +37,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -57,4 +59,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 8b46b088d627b765f09395eb92e9d0794be2ad4a..fe14968f747d1b8642dda6e0878af60c2dd35e75 100644 (file)
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -38,6 +38,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -58,4 +60,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index dec97c4d81b55132d3ab39c72ef27804da996775..ea57e52fe7a9567a9079ec2ead8cee01a06518cd 100644 (file)
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -25,6 +26,8 @@ CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -45,4 +48,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 0327e5adc8c1f52c70465242f5823340f2180322..7b80337c0f68f68a1b4d8075862e44bd28e775a9 100644 (file)
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -44,6 +44,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -66,4 +68,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 49d8fc70e1087f9232d8148222d8833088c0a843..6ae1dbf451b5f37067f0f00ab19cdd9cda75f40c 100644 (file)
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -40,6 +40,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -61,4 +63,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 28a2c40444dd99f83debbd2114218bd1c5393a38..da19f18322737062ce94e6e62ce5a81f6a35cfa3 100644 (file)
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -41,6 +41,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -62,4 +64,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 0f25faf20797ee721341c4376781656082530b9f..f87cfb3ee0d447ce0c1cbfc9cba845ecfd103d9c 100644 (file)
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xEFF40000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -28,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -49,4 +52,3 @@ CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y