Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
+config HAS_CUSTOM_SYS_INIT_SP_ADDR
+ bool "Use a custom location for the initial stack pointer address"
+ depends on ARC || (ARM && !INIT_SP_RELATIVE) || MIPS || PPC || RISCV
+ default y if TFABOOT
+ help
+ Typically, we use an initial stack pointer address that is calculated
+ by taking the statically defined CONFIG_SYS_INIT_RAM_ADDR, adding the
+ statically defined CONFIG_SYS_INIT_RAM_SIZE and then subtracting the
+ build-time constant of GENERATED_GBL_DATA_SIZE. On MIPS a different
+ but statica calculation is performed. However, some platforms will
+ take a different approach. Say Y here to define the address statically
+ instead.
+
+config CUSTOM_SYS_INIT_SP_ADDR
+ hex "Static location for the initial stack pointer"
+ depends on HAS_CUSTOM_SYS_INIT_SP_ADDR
+ default SYS_TEXT_BASE if TFABOOT
+
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
Defines the SEC controller register space as Little Endian
- MIPS CPU options:
- CONFIG_SYS_INIT_SP_OFFSET
-
- Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
- pointer. This is needed for the temporary stack before
- relocation.
-
CONFIG_XWAY_SWAP_BYTES
Enable compilation of tools/xway-swap-bytes needed for Lantiq
#include <config.h>
#include <linux/linkage.h>
#include <asm/arcregs.h>
+#include <system-constants.h>
ENTRY(_start)
/* Setup interrupt vector base that matches "__text_start" */
#endif
/* Establish C runtime stack and frame */
- mov %sp, CONFIG_SYS_INIT_SP_ADDR
+ mov %sp, SYS_INIT_SP_ADDR
mov %fp, %sp
/* Allocate reserved area from current top of stack */
#include <asm-offsets.h>
#include <config.h>
#include <common.h>
+#include <system-constants.h>
/*
*************************************************************************
* it point to the end of OCRAM if the SP is zero.
*/
cmp sp, #0x00000000
- ldreq sp, =CONFIG_SYS_INIT_SP_ADDR
+ ldreq sp, =SYS_INIT_SP_ADDR
/*
* Store all registers on old stack pointer, this will allow us later to
#include <asm-offsets.h>
#include <config.h>
#include <linux/linkage.h>
+#include <system-constants.h>
.pushsection .text.s_init, "ax"
WEAK(s_init)
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr sp, =CONFIG_SPL_STACK
#else
- ldr sp, =CONFIG_SYS_INIT_SP_ADDR
+ ldr sp, =SYS_INIT_SP_ADDR
#endif
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#ifdef CONFIG_SPL_DM
#include <asm/system.h>
#include <linux/linkage.h>
#include <asm/armv7.h>
+#include <system-constants.h>
/*************************************************************************
*
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr r0, =(CONFIG_SPL_STACK)
#else
- ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
+ ldr r0, =(SYS_INIT_SP_ADDR)
#endif
bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
mov sp, r0
#include <asm-offsets.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
+#include <system-constants.h>
/*
* This file handles the target-independent stages of the U-Boot
#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr r0, =(CONFIG_SPL_STACK)
#else
- ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
+ ldr r0, =(SYS_INIT_SP_ADDR)
#endif
bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
mov sp, r0
#include <asm-offsets.h>
#include <asm/macro.h>
#include <linux/linkage.h>
+#include <system-constants.h>
/*
* This file handles the target-independent stages of the U-Boot
#endif
add x0, x0, #CONFIG_SYS_INIT_SP_BSS_OFFSET
#else
- ldr x0, =(CONFIG_SYS_INIT_SP_ADDR)
+ ldr x0, =(SYS_INIT_SP_ADDR)
#endif
bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
mov x0, sp
#include <config.h>
#include <asm/assembler.h>
#include <linux/linkage.h>
+#include <system-constants.h>
.type __hard_fault_entry, %function
__hard_fault_entry:
.section .vectors
ENTRY(_start)
- .long CONFIG_SYS_INIT_SP_ADDR @ 0 - Reset stack pointer
+ .long SYS_INIT_SP_ADDR @ 0 - Reset stack pointer
.long reset @ 1 - Reset
.long __invalid_entry @ 2 - NMI
.long __hard_fault_entry @ 3 - HardFault
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
-/* Kirkwood has 2k of Security SRAM, use it for SP */
-#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
-
#define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE
#define MV_UART_CONSOLE_BASE KW_UART0_BASE
#define MV_SATA_BASE KW_SATA_BASE
#define CONFIG_SYS_L2_PL310
-/* end of 16M scrubbed by training in bootrom */
-#define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000
-
#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
/* Needed for SPI NOR booting in SPL */
#include <config.h>
#include <linux/linkage.h>
+#include <system-constants.h>
ENTRY(lowlevel_init)
ldr r0, =MERAM_BASE
#include <config.h>
#include <linux/linkage.h>
+#include <system-constants.h>
ENTRY(lowlevel_init)
#ifndef CONFIG_SPL_BUILD
#endif
_exit_init_l2_a15:
- ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
+ ldr r3, =(SYS_INIT_SP_ADDR)
sub sp, r3, #4
str lr, [sp]
#include <config.h>
#include <linux/linkage.h>
+#include <system-constants.h>
ENTRY(lowlevel_init)
- ldr sp, = CONFIG_SYS_INIT_SP_ADDR
+ ldr sp, = SYS_INIT_SP_ADDR
b uniphier_cache_disable
ENDPROC(lowlevel_init)
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
-
-#ifndef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_INIT_SP_OFFSET)
-#endif
+#include <system-constants.h>
#ifdef CONFIG_32BIT
# define STATUS_SET 0
.macro setup_stack_gd
li t0, -16
- PTR_LI t1, CONFIG_SYS_INIT_SP_ADDR
+ PTR_LI t1, SYS_INIT_SP_ADDR
and sp, t1, t0 # force 16 byte alignment
PTR_SUBU \
sp, sp, GD_SIZE # reserve space for gd
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/asm.h>
+#include <system-constants.h>
#include "mt7628.h"
-/* Set temporary stack address range */
-#ifndef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_INIT_SP_OFFSET)
-#endif
-
#define CACHE_STACK_SIZE 0x4000
-#define CACHE_STACK_BASE (CONFIG_SYS_INIT_SP_ADDR - CACHE_STACK_SIZE)
+#define CACHE_STACK_BASE (SYS_INIT_SP_ADDR - CACHE_STACK_SIZE)
#define DELAY_USEC(us) ((58 * (us)) / 3)
#if CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F)
/* Set malloc base */
- li t0, (CONFIG_SYS_INIT_SP_ADDR + 15) & (~15)
+ li t0, (SYS_INIT_SP_ADDR + 15) & (~15)
PTR_S t0, GD_MALLOC_BASE(k0) # gd->malloc_base offset
#endif
#include <common.h>
#include <asm-offsets.h>
#include <mpc83xx.h>
+#include <system-constants.h>
#include <ioports.h>
#include <asm/global_data.h>
#include <asm/io.h>
0;
/* Pointer is writable since we allocated a register for it */
- gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR;
+ gd = (gd_t *)SYS_INIT_SP_ADDR;
/* global data region was cleared in start.S */
#include <asm-offsets.h>
#include <clock_legacy.h>
#include <mpc83xx.h>
+#include <system-constants.h>
#include <time.h>
#include <asm/global_data.h>
void cpu_init_f (volatile immap_t * im)
{
/* Pointer is writable since we allocated a register for it */
- gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR;
+ gd = (gd_t *)SYS_INIT_SP_ADDR;
/* global data region was cleared in start.S */
#include <asm-offsets.h>
#include <config.h>
#include <mpc83xx.h>
+#include <system-constants.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
/* set up the stack pointer in our newly created
* cache-ram; use r3 to keep the new SP for now to
* avoid overiding the SP it uselessly */
- lis r3, CONFIG_SYS_INIT_SP_ADDR@h
- ori r3, r3, CONFIG_SYS_INIT_SP_ADDR@l
+ lis r3, SYS_INIT_SP_ADDR@h
+ ori r3, r3, SYS_INIT_SP_ADDR@l
/* r4 = end of GD area */
addi r4, r3, GENERATED_GBL_DATA_SIZE
*/
#include <common.h>
+#include <system-constants.h>
#include <asm-offsets.h>
#include <asm/global_data.h>
#include <asm/processor.h>
#endif
/* Pointer is writable since we allocated a register for it */
- gd = (gd_t *)CONFIG_SYS_INIT_SP_ADDR;
+ gd = (gd_t *)SYS_INIT_SP_ADDR;
/* gd area was zeroed during startup */
#include <asm-offsets.h>
#include <config.h>
#include <mpc85xx.h>
+#include <system-constants.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
bne 1b
#if CONFIG_VAL(SYS_MALLOC_F_LEN)
- lis r4,CONFIG_SYS_INIT_SP_ADDR@h
- ori r4,r4,CONFIG_SYS_INIT_SP_ADDR@l
+ lis r4,SYS_INIT_SP_ADDR@h
+ ori r4,r4,SYS_INIT_SP_ADDR@l
addi r3,r3,16 /* Pre-relocation malloc area */
stw r3,GD_MALLOC_BASE(r4)
#include <config.h>
#include <common.h>
#include <elf.h>
+#include <system-constants.h>
#include <asm/encoding.h>
#include <generated/asm-offsets.h>
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
li t1, CONFIG_SPL_STACK
#else
- li t1, CONFIG_SYS_INIT_SP_ADDR
+ li t1, SYS_INIT_SP_ADDR
#endif
and sp, t1, t0 /* force 16 byte alignment */
*/
#include <config.h>
+#include <system-constants.h>
MEMORY {
ROM : ORIGIN = ROM_BASE, LENGTH = ROM_SIZE
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw"
CONFIG_IDENT_STRING="\nSBx81LIFKW"
CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat"
CONFIG_IDENT_STRING="\nSBx81LIFXCAT"
CONFIG_SYS_LOAD_ADDR=0x1000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_NR_DRAM_BANKS=8
CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte"
CONFIG_SYS_LOAD_ADDR=0x40001000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50
CONFIG_FIT=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
CONFIG_NR_DRAM_BANKS=12
CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte"
CONFIG_SYS_LOAD_ADDR=0x40001000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50
CONFIG_FIT=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
CONFIG_NR_DRAM_BANKS=12
CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte"
CONFIG_SYS_LOAD_ADDR=0x40001000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50
CONFIG_FIT=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_AX25_AE350=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80
CONFIG_FIT=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_BOOTDELAY=3
CONFIG_TARGET_AX25_AE350=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_RISCV_SMODE=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_TARGET_AX25_AE350=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80
CONFIG_FIT=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_BOOTDELAY=3
CONFIG_TARGET_AX25_AE350=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70
CONFIG_FIT=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_BOOTDELAY=3
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_RISCV_SMODE=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_ARCH_RV64I=y
CONFIG_XIP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70
CONFIG_FIT=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_BOOTDELAY=3
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;"
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x280000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_AM335X_USB1=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x81000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0
CONFIG_TIMESTAMP=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_CLOCK_SYNTHESIZER=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt;run mmcboot;run nandboot;run netboot;"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_LOCALVERSION="-EETS-1.0.0"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=1
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SERIES=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_SHC_ICT=y
CONFIG_SERIES=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_SHC_NETBOOT=y
CONFIG_SERIES=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_SPL=y
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_BOOTDELAY=10
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi"
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_AM43XX=y
CONFIG_ENV_OFFSET_REDUND=0x120000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00
CONFIG_QSPI_BOOT=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_RTC_DDR_SUPPORT=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_AM43XX=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_SYS_MEMTEST_START=0x88000000
CONFIG_SYS_MEMTEST_END=0x89000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_CLK_FREQ=50000000
CONFIG_SYS_LOAD_ADDR=0x44000000
CONFIG_ENV_ADDR=0x40000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe8083000
CONFIG_SYS_MONITOR_BASE=0x00000000
CONFIG_BOOTDELAY=3
# CONFIG_CMDLINE_EDITING is not set
CONFIG_IDENT_STRING=" for ARNDALE"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_USE_PREBOOT=y
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8000000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_CLK_FREQ=750000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS3,115200n8"
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS3,115200n8"
CONFIG_IDENT_STRING="bpi-m5"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_TARGET_BCM963158=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_RSASSA_PSS=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_TARGET_BCM96753REF=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_CIPHER=y
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_TARGET_BCM968360BG=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_TARGET_BCM968580XREF=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x11000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_ENV_SIZE=0x80000
CONFIG_DEFAULT_DEVICE_TREE="ns3-board"
CONFIG_SYS_LOAD_ADDR=0x80080000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_SIGNATURE_MAX_SIZE=0x20000000
CONFIG_IDENT_STRING=" beelink"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" beelink"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" beelink"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_TARGET_BLANCHE=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0x40000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_HUSH_PARSER=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x50000
CONFIG_SYS_LOAD_ADDR=0x80000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x80000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x80000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x50000
CONFIG_SYS_LOAD_ADDR=0x80000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_IDENT_STRING="\nBubblegum-96"
CONFIG_SYS_LOAD_ADDR=0x7ffc0
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyOWL5,115200n8"
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0
CONFIG_TIMESTAMP=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot"
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
CONFIG_SILENT_CONSOLE=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00
CONFIG_BOOTCOMMAND="mmc dev 0; if mmc rescan; then if run loadbootscript; then run bootscript; fi; fi; mmc dev 1; if mmc rescan; then run emmcboot; fi;"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_MEMTEST_START=0x88000000
CONFIG_SYS_MEMTEST_END=0x89000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_OF_BOARD_FIXUP=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
CONFIG_IDENT_STRING="Presidio-SoC"
CONFIG_SYS_LOAD_ADDR=0x10000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_REMAKE_ELF=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
CONFIG_IDENT_STRING="Presidio-SoC"
CONFIG_SYS_LOAD_ADDR=0x10000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_REMAKE_ELF=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard"
CONFIG_IDENT_STRING="Presidio-SoC"
CONFIG_SYS_LOAD_ADDR=0x10000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_REMAKE_ELF=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SYS_LOAD_ADDR=0x70000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70007f00
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BUILD_TARGET="u-boot.kwb"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_IDENT_STRING="\ncubieboard7"
CONFIG_SYS_LOAD_ADDR=0x7ffc0
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
CONFIG_IDENT_STRING=" D2 v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_LTO=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_ENV_ADDR=0x60100000
CONFIG_LTO=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8001ff00
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_LTO=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_BUILD_TARGET="u-boot.kwb"
CONFIG_SYS_MEMTEST_START=0x00800000
CONFIG_SYS_MEMTEST_END=0x00ffffff
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg"
CONFIG_SYS_LOAD_ADDR=0x80280000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80008000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_TARGET_DEVKIT8000=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325"
CONFIG_IDENT_STRING="\nD-Link DNS-325"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar"
CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C"
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_REMAKE_ELF=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C"
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x100000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x3D0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv ethact egiga0; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;"
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1"
CONFIG_SYS_PCI_64BIT=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87f00000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="lpc3250-ea3250"
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=1048575
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_IDENT_STRING=" EDMiniV2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0xFFF84000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xf40
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x62000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="emsdp"
CONFIG_SYS_CLK_FREQ=40000000
CONFIG_SYS_LOAD_ADDR=0x10000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10100000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
CONFIG_IDENT_STRING=" for ESPRESSO7420"
CONFIG_SYS_LOAD_ADDR=0x43e00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2158000
# CONFIG_AUTOBOOT is not set
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
CONFIG_FIT=y
CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x61800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x62000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
CONFIG_BOOTCOMMAND="sf probe;sf read 0x62000000 0x140800 0x500000;dcache off;go 0x62000000"
CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_DEBUG_UART_CLOCK=132000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=0
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg"
CONFIG_SYS_LOAD_ADDR=0x80280000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet"
CONFIG_IDENT_STRING="\nSeagate GoFlex Home"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_RZA1=y
CONFIG_SYS_CLK_FREQ=66666666
CONFIG_SYS_LOAD_ADDR=0x20400000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20900000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="ignore_loglevel"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus"
CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=917504
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0xFFF88000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_IDENT_STRING="\nHikey960"
CONFIG_SYS_LOAD_ADDR=0x80000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw"
CONFIG_IDENT_STRING="hikey"
CONFIG_SYS_LOAD_ADDR=0x80000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0
CONFIG_REMAKE_ELF=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0"
CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect"
CONFIG_IDENT_STRING=" Iomega iConnect"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_TARGET_OMAP3_IGEP00X0=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_MIPS_CACHE_DISABLE=y
# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
CONFIG_MIPS_BOOT_FDT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87fff000
CONFIG_TIMESTAMP=y
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg"
CONFIG_SYS_LOAD_ADDR=0x80280000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg"
CONFIG_SYS_LOAD_ADDR=0x80280000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x20209000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20240000
CONFIG_SD_BOOT=y
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x20209000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20280000
CONFIG_SD_BOOT=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_IDENT_STRING=" IS v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_LOAD_ADDR=0x7fc0
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_LOAD_ADDR=0x7fc0
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_LOAD_ADDR=0x7fc0
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x8000
CONFIG_SYS_LOAD_ADDR=0x7fc0
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_ENV_ADDR=0x24F00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_SYS_MONITOR_BASE=0x27F40000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_ENV_ADDR=0x24F00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_SYS_MONITOR_BASE=0x27F40000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_ENV_ADDR=0x24F00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_SYS_MONITOR_BASE=0x27F40000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_SYS_LOAD_ADDR=0x7fc0
CONFIG_ENV_ADDR=0x24F00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20
CONFIG_SYS_MONITOR_BASE=0x27F40000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_SYS_CLK_FREQ=16000000
CONFIG_SYS_LOAD_ADDR=0x30000000
CONFIG_LOCALVERSION="-iotdk-1.0"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80008000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_PROMPT="IoTDK# "
CONFIG_SYS_CBSIZE=256
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
CONFIG_IDENT_STRING=" jethubj100"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" jethubj80"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern"
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}"
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${boot} run_mon; run set_name_pmmc get_pmmc_${boot} run_pmmc; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern"
CONFIG_ENV_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}"
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern"
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}"
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern"
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x100000
CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10
CONFIG_TIMESTAMP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_IDENT_STRING=" khadas-vim2"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_IDENT_STRING=" khadas-vim3"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" khadas-vim3"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" khadas-vim3"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" khadas-vim3l"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" khadas-vim3l"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" khadas-vim3l"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" khadas-vim"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood 128M16"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_KM_KIRKWOOD_128M16=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_KM_KIRKWOOD=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_KM_FPGA_CONFIG=y
CONFIG_KM_KIRKWOOD_PCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3
CONFIG_KM_ENV_IS_IN_SPI_NOR=y
CONFIG_KM_PIGGY4_88E6352=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_KM_ENV_IS_IN_SPI_NOR=y
CONFIG_KM_PIGGY4_88E6352=y
CONFIG_KM_NUSA=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_KM_FPGA_NO_RESET=y
CONFIG_KM_ENV_IS_IN_SPI_NOR=y
CONFIG_KM_SUSE2=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800eff0
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb"
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_ENV_SIZE=0x4000
CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3"
CONFIG_SYS_LOAD_ADDR=0xc0700000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80010000
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_IDENT_STRING=" libretech-ac"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_IDENT_STRING=" libretech-cc"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" libretech-cc-v2"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_IDENT_STRING=" libretech-s905d-pc"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_IDENT_STRING=" libretech-s912-pc"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
CONFIG_FSL_LS_PPA=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_FSL_LS_PPA=y
CONFIG_ENV_ADDR=0x60300000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_ENV_ADDR=0x40300000
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
CONFIG_AHCI=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_AHCI=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
# CONFIG_QIXIS_I2C_ACCESS is not set
CONFIG_FSL_LS_PPA=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FSL_LS_PPA=y
CONFIG_ENV_ADDR=0x80300000
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FSL_USE_PCA9547_MUX=y
CONFIG_FSL_QIXIS=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT_VERBOSE=y
# CONFIG_QIXIS_I2C_ACCESS is not set
CONFIG_FSL_LS_PPA=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FSL_LS_PPA=y
CONFIG_ENV_ADDR=0x80300000
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_ENV_ADDR=0x20300000
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0
# CONFIG_SYS_MALLOC_F is not set
CONFIG_REMAKE_ELF=y
CONFIG_MP=y
CONFIG_IDENT_STRING=" LS-CHLv2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_API=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_IDENT_STRING=" LS-XHL"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_API=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb"
CONFIG_SYS_LOAD_ADDR=0x70800800
CONFIG_SPL_PAYLOAD="u-boot.bin"
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000
CONFIG_SD_BOOT=y
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb"
CONFIG_TARGET_MT7623=y
CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
CONFIG_TARGET_MT7623=y
CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x42007f1c
CONFIG_SPL_PAYLOAD="u-boot-lzma.img"
CONFIG_BUILD_TARGET="u-boot-mtk.bin"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41fffef0
CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_IDENT_STRING=" nanopi-k2"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220"
CONFIG_IDENT_STRING="\nNAS 220"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_IDENT_STRING=" 2Big v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_IDENT_STRING=" NS v2 Lite"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_IDENT_STRING=" NS Max v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_IDENT_STRING=" NS v2 Mini"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_IDENT_STRING=" NS v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000"
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_DEBUG_UART=y
CONFIG_SYS_MEMTEST_START=0x04000000
CONFIG_SYS_MEMTEST_END=0x040f0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SYS_LOAD_ADDR=0x4000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_AHCI=y
CONFIG_SYS_MEMTEST_START=0x2800000
CONFIG_SYS_MEMTEST_END=0x28f0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SYS_LOAD_ADDR=0x2800000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_IDENT_STRING=" odroid-c2"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" odroid-c4/hc4"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" odroid-n2/n2-plus"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_MEM_TOP_HIDE=0x01600000
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x42e00000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SYS_MEM_TOP_HIDE=0x00100000
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL=y
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_USE_PREBOOT=y
CONFIG_SPL=y
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_SYS_MONITOR_BASE=0x10000000
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="omap3-beagle.dtb"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run envboot; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
CONFIG_SPL=y
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_USE_PREBOOT=y
CONFIG_SPL=y
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_SYS_MONITOR_BASE=0x10000000
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_TARGET_OMAP4_PANDA=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00
CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_CMD_BAT=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00
CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00
CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; "
CONFIG_DEFAULT_FDT_FILE="omap5-uevm.dtb"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0xc0700000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_OF_BOARD_FIXUP=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000
# CONFIG_EXPERT is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_RISCV_SMODE=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000
# CONFIG_EXPERT is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base"
CONFIG_IDENT_STRING="\nOpenRD-Base"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=524288
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client"
CONFIG_IDENT_STRING="\nOpenRD-Client"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=524288
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate"
CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=524288
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000
CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_IDENT_STRING=" p200"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" p201"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING=" p212"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
CONFIG_IDENT_STRING=" for Peach-Pi"
CONFIG_SYS_LOAD_ADDR=0x23e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
CONFIG_IDENT_STRING=" for Peach-Pit"
CONFIG_SYS_LOAD_ADDR=0x23e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
CONFIG_SYS_MEMTEST_START=0x88000000
CONFIG_SYS_MEMTEST_END=0x88080000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ffff
CONFIG_TIMESTAMP=y
CONFIG_BOOTDELAY=5
CONFIG_BOOTCOMMAND="run distro_bootcmd || run legacy_bootcmd"
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_ENV_ADDR=0x10040000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_ENV_ADDR=0x10040000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02"
CONFIG_IDENT_STRING="\nPogo E02"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
CONFIG_IDENT_STRING="\nPogoplug V4"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=10
CONFIG_TARGET_POLEG=y
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_ENV_ADDR=0x80100000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7f10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run common_bootargs; run romboot"
CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_SYS_PCI_64BIT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2981a000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_IDENT_STRING="poplar"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x200000
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="poplar# "
CONFIG_SYS_MAXARGS=64
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb"
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_RISCV_SMODE=y
# CONFIG_OF_BOARD_FIXUP is not set
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
CONFIG_DISPLAY_CPUINFO=y
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_ARCH_RV64I=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};"
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_IDENT_STRING=" radxa-zero"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb"
# CONFIG_CONSOLE_MUX is not set
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_SILENT_CONSOLE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-rock2-square.dtb"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffee0
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_IDENT_STRING=" s400"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_LOAD_ADDR=0x71080000
CONFIG_SYS_MEMTEST_START=0x71000000
CONFIG_SYS_MEMTEST_END=0xb0000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x74c00000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_TARGET_S5P_GONI=y
CONFIG_SYS_LOAD_ADDR=0x34000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x33000000
# CONFIG_AUTOBOOT is not set
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}"
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run mmcboot"
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_ENV_OFFSET_REDUND=0x100000
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00
CONFIG_FIT=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_QSPI_BOOT=y
CONFIG_SPI_BOOT=y
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_SYS_BOOT_GET_CMDLINE=y
CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0
CONFIG_FIT=y
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_MEMTEST_START=0x60000000
CONFIG_SYS_MEMTEST_END=0x70000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_SYS_MEMTEST_START=0x60000000
CONFIG_SYS_MEMTEST_END=0x70000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0
CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug"
CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
CONFIG_SYS_LOAD_ADDR=0x800000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=524288
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
CONFIG_USE_PREBOOT=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
CONFIG_USE_PREBOOT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_TARGET_SIPEED_MAIX=y
CONFIG_ARCH_RV64I=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff
CONFIG_STACK_SIZE=0x100000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run k210_bootcmd"
CONFIG_TARGET_SIPEED_MAIX=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff
CONFIG_STACK_SIZE=0x100000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run k210_bootcmd"
CONFIG_IDENT_STRING=" for SMDK5250"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
CONFIG_IDENT_STRING=" for SMDK5420"
CONFIG_SYS_LOAD_ADDR=0x23e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CLK_FREQ=12000000
CONFIG_SYS_LOAD_ADDR=0x30000000
CONFIG_ENV_ADDR=0x40000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2f000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)"
CONFIG_IDENT_STRING=" for SMDKC210/V310"
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000
CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000"
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_TARGET_SNIPER=y
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
CONFIG_SYS_LOAD_ADDR=0x02000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x3fe00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000
CONFIG_REMAKE_ELF=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
CONFIG_SYS_LOAD_ADDR=0x02000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_IDENT_STRING="socfpga_arria10"
CONFIG_SPL_FS_FAT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffe2b000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
CONFIG_SPL_FIT=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1"
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
CONFIG_USE_BOOTARGS=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE10_STANDARD=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_TARGET_SOCFPGA_IS1=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
CONFIG_USE_BOOTARGS=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
CONFIG_USE_BOOTARGS=y
CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y
CONFIG_IDENT_STRING="socfpga_n5x"
CONFIG_SPL_FS_FAT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_IDENT_STRING="socfpga_n5x"
CONFIG_SPL_FS_FAT=y
# CONFIG_PSCI_RESET is not set
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000
CONFIG_REMAKE_ELF=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y
CONFIG_IDENT_STRING="socfpga_n5x"
CONFIG_SPL_FS_FAT=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_BOOT_RETRY=y
CONFIG_BOOT_RETRY_TIME=45
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socrates.dtb"
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x40000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_IDENT_STRING="socfpga_stratix10"
CONFIG_SPL_FS_FAT=y
CONFIG_SYS_LOAD_ADDR=0x02000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SYS_MEMTEST_END=0x3fe00000
CONFIG_OPTIMIZE_INLINING=y
CONFIG_SPL_OPTIMIZE_INLINING=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000
CONFIG_REMAKE_ELF=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y
CONFIG_ENV_OFFSET_REDUND=0x110000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
CONFIG_FIT=y
CONFIG_TIMESTAMP=y
CONFIG_BOOTDELAY=5
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_SILENT_CONSOLE=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy"
CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fastbootcmd"
CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
CONFIG_SYS_LOAD_ADDR=0x40000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7bdfff10
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_SYS_LOAD_ADDR=0x90400000
CONFIG_ENV_ADDR=0x8040000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_TARGET_STM32F429_EVALUATION=y
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_TARGET_STM32F469_DISCOVERY=y
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_TARGET_STM32F746_DISCO=y
CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_SYS_LOAD_ADDR=0x8008000
CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_TARGET_STM32H743_DISCO=y
CONFIG_SYS_LOAD_ADDR=0xd0400000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_TARGET_STM32H743_EVAL=y
CONFIG_SYS_LOAD_ADDR=0xd0400000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_TARGET_STM32H750_ART_PI=y
CONFIG_SYS_LOAD_ADDR=0xc1800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
# CONFIG_ARMV7_VIRT is not set
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x50000000
CONFIG_ENV_ADDR=0xC0000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SYS_LOAD_ADDR=0x80000000
CONFIG_TARGET_DEVELOPERBOX=y
CONFIG_AHCI=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe0000000
CONFIG_FIT=y
CONFIG_BOOTSTAGE_STASH_SIZE=4096
CONFIG_HUSH_PARSER=y
CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
CONFIG_SYS_MEM_TOP_HIDE=0x80000
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core"
CONFIG_SYS_LOAD_ADDR=0x500000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x57fff0
CONFIG_REMAKE_ELF=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb"
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0xff000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_REMAKE_ELF=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_BOARD_TPLINK_WDR4300=y
CONFIG_SYS_MEMTEST_START=0x80100000
CONFIG_SYS_MEMTEST_END=0x83f00000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEM_TOP_HIDE=0x100000
CONFIG_SYS_LOAD_ADDR=0x44800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTARGS=y
CONFIG_AHCI=y
CONFIG_OF_BOARD_FIXUP=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SYS_MEMTEST_START=0x00800000
CONFIG_SYS_MEMTEST_END=0x00ffffff
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_IDENT_STRING=" u200"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_TIMESTAMP=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
CONFIG_SPL=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_TIMESTAMP=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
CONFIG_TARGET_VEXPRESS64_JUNO=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0xff000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_REMAKE_ELF=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_ENV_ADDR=0x47F80000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60000f10
CONFIG_SYS_MONITOR_BASE=0x40000000
CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash"
CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
CONFIG_DEFAULT_DEVICE_TREE="at91-vinco"
CONFIG_SYS_LOAD_ADDR=0x22000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000f00
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb"
CONFIG_SILENT_CONSOLE=y
CONFIG_IDENT_STRING=" wetek-core2"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_REMAKE_ELF=y
CONFIG_OF_BOARD_SETUP=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x120000
CONFIG_SYS_LOAD_ADDR=0x80008000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS2,115200n8"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_ENV_ADDR=0x100000
CONFIG_DEBUG_UART=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0"
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1"
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_AUTOBOOT is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
CONFIG_ZYNQMP_PSU_INIT_ENABLED=y
# CONFIG_CMD_ZYNQMP is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
CONFIG_FIT=y
CONFIG_ZYNQMP_PSU_INIT_ENABLED=y
# CONFIG_CMD_ZYNQMP is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
CONFIG_FIT=y
CONFIG_ZYNQMP_PSU_INIT_ENABLED=y
# CONFIG_CMD_ZYNQMP is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
CONFIG_FIT=y
CONFIG_ZYNQMP_PSU_INIT_ENABLED=y
# CONFIG_CMD_ZYNQMP is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000
CONFIG_REMAKE_ELF=y
# CONFIG_MP is not set
CONFIG_FIT=y
# CONFIG_CMD_ZYNQMP is not set
# CONFIG_PSCI_RESET is not set
CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */
#define CONFIG_SYS_INIT_RAM_CTRL 0x221
-#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
/*
* Start addresses for the final memory configuration
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
#define CONFIG_SYS_INIT_RAM_CTRL 0x21
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE - 0x10)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define LDS_BOARD_TEXT \
. = DEFINED(env_offset) ? env_offset : .; \
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*
* Start addresses for the final memory configuration
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x20000 /* Size of used area in internal SRAM */
#define CONFIG_SYS_INIT_RAM_CTRL 0x221
-#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
/*
* Start addresses for the final memory configuration
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
#define CONFIG_SYS_INIT_RAM_CTRL 0x221
-#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
#define CONFIG_SYS_INIT_RAM_CTRL 0x221
-#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* FLASH on the Local Bus
#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
/*
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
/*
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
#define CONFIG_SYS_SDRAM_BASE1 0x880000000
#if defined(CONFIG_TARGET_AM642_A53_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
#else
/*
* Link BSS to be within SPL in a dedicated region located near the top of
#define CONFIG_SPL_BSS_START_ADDR (TI_SRAM_SCRATCH_BOARD_EEPROM_START -\
CONFIG_SPL_BSS_MAX_SIZE)
/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
/* SPL Loader Configuration */
#ifdef CONFIG_TARGET_AM654_A53_EVM
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
#else
/*
* Link BSS to be within SPL in a dedicated region located near the top of
#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
CONFIG_SPL_BSS_MAX_SIZE)
/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
/* size of internal SRAM */
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_SIZE 0x1000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
/* Miscellaneous configurable options */
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
/*
* Serial Port
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
/*
* Serial Port
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
-
/* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 4)
/* STACK */
-#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
#define STACK_AREA_SIZE 0xC000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
#define CONFIG_EXYNOS_SPL
/* Miscellaneous configurable options */
-#define CONFIG_IRAM_STACK 0x02050000
-
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
#define CONFIG_S5P_PA_SYSRAM 0x02020000
#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM
#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE)
#endif
-#define SYS_INIT_RAM_END (CONFIG_SYS_INIT_RAM_ADDR \
- + CONFIG_SYS_INIT_RAM_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \
- - GENERATED_GBL_DATA_SIZE)
-
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
#define CONFIG_SYS_INIT_RAM_CTRL 0x221
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/*
* Start addresses for the final memory configuration
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-/*
- * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
- * leaving the correct space for initial global data structure above
- * that address while providing maximum stack area below.
- */
+#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
#ifdef CONFIG_AT91SAM9XE
-# define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+# define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
#else
-# define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+# define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
#endif
/* NAND flash */
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
/* NOR flash, if populated */
#ifdef CONFIG_SYS_USE_NORFLASH
#define CONFIG_SYS_SDRAM_BASE 0x70000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
-/*
- * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
- * leaving the correct space for initial global data structure above
- * that address while providing maximum stack area below.
- */
-# define CONFIG_SYS_INIT_SP_ADDR \
- (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* DataFlash */
/* NAND flash */
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* DataFlash */
/* NAND flash */
#define CONFIG_SYS_NS16550_CLK 19660800
/* Init Stack Pointer */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
- GENERATED_GBL_DATA_SIZE)
/* support JEDEC */
#define PHYS_FLASH_1 0x88000000 /* BANK 0 */
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_512M
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_128M
/*
* Just before re-loaction, new SP is updated and re-location happens.
* So pointing the initial SP to end of 2GB DDR is not a problem
*/
-#define CONFIG_SYS_INIT_SP_ADDR (PHYS_SDRAM_1 + 0x80000000)
/* 12MB Malloc size */
/* console configuration */
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/*
* CONFIG_SYS_LOAD_ADDR - 1 MiB.
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#endif /* __CONFIG_H */
#include "rcar-gen2-common.h"
/* STACK */
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* U-Boot */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* U-Boot */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* U-Boot */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_SDRAM_BASE 0x00000000
/* U-Boot */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M)
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Ethernet */
#define CONFIG_FEC_FIXED_SPEED _1000BASET
* and we place the initial stack pointer in our SRAM.
*/
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
/*
* Our platforms make use of SPL to initalize the hardware (primarily
ENV_NET
/* Default location for tftp and bootm */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
/* On CCP board, USDHC1 is for eMMC */
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
-
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* SPI Flash support */
/* FLASH and environment organization */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Serial console */
#define CONFIG_MXC_UART_BASE UART4_BASE
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#if defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE)
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
-
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
/* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#if defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE)
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_RANGE (4 * 64 * 2048)
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + SZ_32K - GENERATED_GBL_DATA_SIZE)
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
-#ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
- GENERATED_GBL_DATA_SIZE)
-#endif /* CONFIG_MTD_NOR_FLASH */
-
#include <asm/arch/hardware.h>
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* USB Configs */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_64M
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
- - GENERATED_GBL_DATA_SIZE)
-
/*
* DMA
*/
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment */
#endif /* __DH_IMX6_CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* ENV config */
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
/* The 0x120000 value corresponds to above SPI-NOR memory MAP */
/* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */
#define PHYS_SDRAM_1_SIZE SZ_1G
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* UART */
#define PHYS_SDRAM_2_SIZE 0x5ea4ffff
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#ifndef CONFIG_SPL_BUILD
#define PHYS_SDRAM_1_SIZE 0x7B000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000)
-
/* PCI CONFIG */
#define CONFIG_PCI_SCAN_SHOW
/*
* cmd
*/
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
/*
* SoC-specific config
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
#endif /* _CONFIG_EDMINIV2_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#endif /* __EL6Q_COMMON_CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_SDRAM_BASE 0x10000000
#define CONFIG_SYS_SDRAM_SIZE SZ_16M
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_1M)
-
/*
* Environment
*/
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SPL_STACK CONFIG_IRAM_END
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_END
/* DRAM Memory Banks */
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
/* 32kB internal SRAM */
-#define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
-#define CONFIG_SRAM_SIZE (32 << 10)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 /*AT91SAM9XE_SRAM_BASE */
+#define CONFIG_SYS_INIT_RAM_SIZE (32 << 10)
/* 128MB SDRAM in 1 bank */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_IRAM_STACK 0x02050000
-
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
-
/* USB */
#define CONFIG_USB_EHCI_EXYNOS
{9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600}
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_BOOTM_LEN SZ_32M
/* DRAM Memory Banks */
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* NAND flash */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* FLASH on the Local Bus
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Command definition */
#define CONFIG_EXTRA_ENV_SETTINGS \
"image=/boot/fitImage\0" \
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#define CONFIG_SYS_FSL_USDHC_NUM 3
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 1024 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/*
* MTD Command for mtdparts
*/
#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x20000000\0" \
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-
/* Generic Interrupt Controller Definitions */
#define GICD_BASE 0xf6801000
#define GICC_BASE 0xf6802000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-
/* Generic Interrupt Controller Definitions */
#define GICD_BASE 0xe82b1000
#define GICC_BASE 0xe82b2000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_128M
/*
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_1G
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_128M
/*
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in DPRAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* Internal Definitions
/* SDRAM Configuration (for final code, data, stack, heap) */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
/*----------------------------------------------------------------------
* Commands
/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
- GENERATED_GBL_DATA_SIZE)
#endif /* __IMX27LITE_COMMON_CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_SP_OFFSET)
-
/* UART */
#ifdef CONFIG_MXC_UART
# ifdef CONFIG_MX6UL
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/* NAND stuff */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_SP_OFFSET)
-
/* SPL */
#include "imx6_spl.h"
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* SPL */
#ifdef CONFIG_SPL
#include "imx6_spl.h"
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* MMC Config*/
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
/* Link Definitions */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* Link Definitions */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Totally 6GB DDR */
/* Link Definitions */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Totally 6GB or 4G DDR */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
-
/* Default environment is in SD */
/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
-
/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
* USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
* USDHC2 is for SD, USDHC3 is for SD on base board
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
-
/* Default environment is in SD */
/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_INIT_SP_ADDR 0x20240000
-
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
#define PHYS_SDRAM 0x80000000
#include <asm/arch/imx-regs.h>
-#define CONFIG_SYS_INIT_SP_ADDR 0x20280000
-
#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/*
* FLASH and environment organization
#include <linux/sizes.h>
/* SPL Loader Configuration */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
- CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
* : : |
* : : CONFIG_SYS_MALLOC_LEN
* : :
- * : Specified explicitly by CONFIG_SYS_INIT_SP_ADDR
+ * : Specified explicitly by CONFIG_CUSTOM_SYS_INIT_SP_ADDR
* :
* Specified explicitly by CONFIG_SYS_SDRAM_BASE
*
* NOTES:
- * - Stack starts from CONFIG_SYS_INIT_SP_ADDR and grows down,
+ * - Stack starts from CONFIG_CUSTOM_SYS_INIT_SP_ADDR and grows down,
* i.e. towards CONFIG_SYS_SDRAM_BASE but nothing stops it from crossing
* that CONFIG_SYS_SDRAM_BASE in which case data won't be really saved on
* stack any longer and values popped from stack will contain garbage
#define CONFIG_SYS_SDRAM_BASE DCCM_BASE
#define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
-
#define CONFIG_SYS_BOOTM_LEN SZ_128K
#define ROM_BASE CONFIG_SYS_MONITOR_BASE
#define ROM_SIZE SZ_256K
-#define RAM_DATA_BASE CONFIG_SYS_INIT_SP_ADDR
+#define RAM_DATA_BASE SYS_INIT_SP_ADDR
#define RAM_DATA_SIZE CONFIG_SYS_SDRAM_SIZE - \
- (CONFIG_SYS_INIT_SP_ADDR - \
+ (SYS_INIT_SP_ADDR - \
CONFIG_SYS_SDRAM_BASE) - \
CONFIG_SYS_MALLOC_LEN - \
CONFIG_ENV_SIZE
/* SPL Loader Configuration */
#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
#define CONFIG_SYS_UBOOT_BASE 0x50280000
/* Image load address in RAM for DFU boot*/
#else
#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX -\
CONFIG_SPL_BSS_MAX_SIZE)
/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
/* SPL Loader Configuration */
#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + SZ_4M)
#define CONFIG_SYS_UBOOT_BASE 0x50280000
/* Image load address in RAM for DFU boot*/
#else
#define CONFIG_SPL_BSS_START_ADDR (0x41c80000 -\
CONFIG_SPL_BSS_MAX_SIZE)
/* Set the stack right below the SPL BSS section */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* Init Local Bus Memory Controller:
*
#define CONFIG_LS102XA_STREAM_ID
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */
#define CONFIG_SYS_BOOTCOUNT_BE
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN 0xc0000 /* 768k */
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
/* Board and environment settings */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Board and environment settings */
#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#define CONFIG_HOSTNAME "kontron-mx8mm"
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
/* early stack pointer */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
/* SMP */
#define CPU_RELEASE_ADDR secondary_boot_addr
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#endif /* __CONFIG_H_ */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment */
#endif /* __KP_IMX6Q_TPC_IMX6_CONFIG_H_ */
#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
#define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
#define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x80010000
-
#include <asm/arch/hardware.h>
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* FLASH and environment organization */
/* USB Configs */
#include <asm/arch/stream_id_lsch2.h>
#include <linux/sizes.h>
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#endif
-
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_LS102XA_STREAM_ID
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#include <asm/fsl_secure_boot.h>
#endif
#define CONFIG_LS102XA_STREAM_ID
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/*
* Environment
*/
#define CONFIG_LS102XA_STREAM_ID
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment */
#define CONFIG_SYS_BOOTM_LEN 0x8000000 /* 128 MB */
#define CONFIG_LS102XA_STREAM_ID
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/*
* Environment
*/
#include <asm/arch/soc.h>
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#include <asm/arch/config.h>
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#endif
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
/*
* Environment
*/
#include <asm/arch/stream_id_lsch2.h>
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#endif
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
/*
* Environment
*/
#define LS1088ARDB_PB_BOARD 0x4A
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#endif
/* Link Definitions */
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
#include <asm/arch/config.h>
/* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
-#endif
/* We need architecture specific misc initializations */
#define CONFIG_FSL_MEMAC
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FLASH_BASE 0x20000000
/* DDR */
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/*
* U-Boot general configurations
*/
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/* Envs are stored in NOR flash */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment configs */
/* USB configs */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE
-/*
- * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
- * leaving the correct space for initial global data structure above
- * that address while providing maximum stack area below.
- */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM0 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM0
+#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#endif
#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_INIT_SP_ADDR 0x20000000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64 MiB */
/* ROM USB boot support, auto-execute boot.scr at scriptaddr */
#include <linux/sizes.h>
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* SPL -> Uboot */
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
/* DRAM */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
/* Environment */
/* Preloader -> Uboot */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
/* MMC */
#define MMC_SUPPORTS_TUNING
#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
/* SPL -> Uboot */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
/* UBoot -> Kernel */
#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000
#define CONFIG_SYS_NS16550_COM1 0x11005200
#define CONFIG_SYS_NS16550_CLK 26000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Environment settings */
/* Uboot definition */
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + \
- SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
#define ENV_BOOT_READ_IMAGE \
"boot_rd_img=mmc dev 0" \
#define CONFIG_SYS_NS16550_COM1 0x11005000
#define CONFIG_SYS_NS16550_CLK 26000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Environment settings */
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* Uboot definition */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + \
- SZ_2M - \
- GENERATED_GBL_DATA_SIZE)
#define ENV_BOOT_READ_IMAGE \
"boot_rd_img=mmc dev 0" \
* Other required minimal configurations
*/
-/* End of 16M scrubbed by training in bootrom */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
-
/*
* Environment
*/
* Other required minimal configurations
*/
-/* End of 16M scrubbed by training in bootrom */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
-
/* When runtime detection fails this is the default */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define CONFIG_SYS_DDR_CLKSEL 0
#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
#define CONFIG_SYS_MAIN_PWR_ON
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
/* Framebuffer and LCD */
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* FLASH and environment organization */
#define CONFIG_FSL_IIM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
#endif /* __MX6CUBOXI_CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/* Framebuffer */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/* USB Configs */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/* MMC Configs */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
/* USB Configs */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#define CONFIG_IOMUX_LPSR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
/*
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#endif /* __CONFIG_H */
#endif
/* Point initial SP in SRAM so SPL can use it too. */
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* NAND */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/*
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/*
* Attached kernel image
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* SPL */
#include "imx6_spl.h" /* common IMX6 SPL configuration */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* NAND */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_256M
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_32M
/*
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#if IS_ENABLED(CONFIG_CMD_USB)
# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE
/** Stack starting address */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0)
/** Extra environment settings */
#define CONFIG_EXTRA_ENV_SETTINGS \
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_TEXT_BASE
/** Stack starting address */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0)
/** Heap size for U-Boot */
#include <linux/sizes.h>
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- - GENERATED_GBL_DATA_SIZE)
-
/* Partitions name */
#define PARTS_BOOT "boot"
#define PARTS_ROOT "platform"
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
-
/* USB */
#define CONFIG_USB_EHCI_EXYNOS
/* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc0000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
- GENERATED_GBL_DATA_SIZE)
#include <asm/arch/hardware.h>
/* Environment options */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32M)
#define CONFIG_SYS_BOOTM_LEN SZ_256M
#ifdef CONFIG_SPL
#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* USB */
#ifdef CONFIG_USB_EHCI_MX6
#define RESERVE_BLOCK_SIZE (512)
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
-#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
-
#endif /* __CONFIG_H */
* image to the top of SDRAM. After relocation u-boot moves the stack to the
* proper place.
*/
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
/* Console configuration */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* NAND */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* NAND */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#endif
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
#define ENV_MMC \
"mmcdev=0\0" \
#include <configs/exynos5-common.h>
#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
/* Display */
#ifdef CONFIG_LCD
#include <configs/exynos5-common.h>
#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
/* DRAM Memory Banks */
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
#define CONFIG_SYS_INIT_RAM_ADDR \
(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
/* SDRAM Configuration (for final code, data, stack, heap) */
#define CONFIG_SYS_SDRAM_BASE 0x88000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
/* Ethernet Configuration */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#ifdef CONFIG_DM_VIDEO
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* PMIC */
#define CONFIG_POWER_PFUZE3000
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
""
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
- GENERATED_GBL_DATA_SIZE)
#endif
""
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
- GENERATED_GBL_DATA_SIZE)
#endif
#define CONFIG_SYS_SDRAM_BASE 0x70000000
#define CONFIG_SYS_SDRAM_SIZE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_BOOTMAPSZ (0x30 << 20)
#define CONFIG_SYS_SDRAM_BASE 0x0
-#define CONFIG_SYS_INIT_SP_ADDR (0x00008000 - GENERATED_GBL_DATA_SIZE)
/* Default environemnt variables */
#define CONFIG_SERVERIP 192.168.0.1
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/* SIZE of malloc pool */
-#define CONFIG_SYS_INIT_SP_ADDR (0x29800000 + 0x1a000)
/*BOOT*/
#define CONFIG_SYS_BOOTM_LEN 0x3c00000
/* SYS */
#define CONFIG_SYS_BOOTM_LEN SZ_64M
-#define CONFIG_SYS_INIT_SP_ADDR 0x200000
/* ATF bl33.bin load address (must match) */
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
#ifndef __PRESIDIO_ASIC_H
#define __PRESIDIO_ASIC_H
-#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
#define CONFIG_SYS_BOOTM_LEN 0x00c00000
/* Generic Timer Definitions */
/* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
#define CONFIG_IRAM_BASE 0xff020000
-#define CONFIG_SYS_INIT_SP_ADDR 0x00400000
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_BSS_START_ADDR 0x4000000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-/* The DTB generated by QEMU is placed at start of RAM, stay away from there */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
-
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* GUIDs for capsule updatable firmware images */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#endif
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define PHY_ANEG_TIMEOUT 20000
/* MEMORY */
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define DRAM_RSV_SIZE 0x08000000
#define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE)
#define CONFIG_SYS_HZ_CLOCK 24000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SPL_STACK 0x10081fff
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
#include <asm/arch-rockchip/hardware.h>
#include "rockchip-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x78000000
-
#define CONFIG_IRAM_BASE 0x10080000
#define CONFIG_SPL_STACK 0x1008FFFF
#define CONFIG_IRAM_BASE 0x10080000
-#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
-
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
/* RAW SD card / eMMC locations. */
#include <asm/arch-rockchip/hardware.h>
#include "rockchip-common.h"
-#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
-/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
-#endif
-#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
-
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK31"
#define CONFIG_IRAM_BASE 0x10080000
#define CONFIG_SYS_HZ_CLOCK 24000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x61100000
-
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK32"
#define CONFIG_IRAM_BASE 0x10080000
#define CONFIG_SYS_HZ_CLOCK 24000000
-#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
-/* Bootrom will load u-boot binary to 0x0 once return from SPL */
-#endif
-#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
#define CONFIG_SPL_STACK 0xff718000
#define CONFIG_IRAM_BASE 0xff700000
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_IRAM_BASE 0xfff80000
-#define CONFIG_SYS_INIT_SP_ADDR 0x00800000
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
#define CONFIG_IRAM_BASE 0xff090000
-#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_BSS_START_ADDR 0x2000000
#define CONFIG_IRAM_BASE 0xff8c0000
-#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
-
#define CONFIG_SPL_BSS_START_ADDR 0x400000
#define CONFIG_SPL_STACK 0x00188000
#define CONFIG_IRAM_BASE 0xff8c0000
-#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
-
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_BSS_START_ADDR 0x00400000
#define CONFIG_IRAM_BASE 0xfdcc0000
-#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000
-
#define CONFIG_SPL_STACK 0x00400000
#define CONFIG_SPL_BSS_START_ADDR 0x4000000
* the VC uses.
*/
#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_SDRAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
#ifdef CONFIG_ARM64
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
#define CONFIG_SYS_SDRAM_BASE 0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)
/* rockchip ohci host driver */
#define CONFIG_USB_OHCI_NEW
/*-----------------------------------------------------------------------
* System memory Configuration
*/
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MEM_SIZE 0x40000000
#define CONFIG_SYS_SDRAM_BASE 0x71000000
#define CONFIG_SAMSUNG_ONENAND 1
#define CONFIG_SYS_ONENAND_BASE 0xB0000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
-
#define CONFIG_USB_GADGET_DWC2_OTG_PHY
#endif /* __CONFIG_H */
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- - GENERATED_GBL_DATA_SIZE)
-
/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
#define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT
#define CONFIG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */
#define CONFIG_SPL_STACK 0x218000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \
- GENERATED_GBL_DATA_SIZE)
#endif
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \
- GENERATED_GBL_DATA_SIZE)
-
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#undef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* SPL */
#define CONFIG_SPL_STACK 0x218000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* SPL */
#define CONFIG_SPL_STACK 0x218000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#define CONFIG_SPL_STACK 0x218000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
#ifdef CONFIG_SD_BOOT
/* u-boot env in sd/mmc card */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* NAND Flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#include "at91-sama5_common.h"
-#define CONFIG_SYS_INIT_SP_ADDR \
- (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* SPL */
#define CONFIG_SPL_STACK 0x218000
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#define CONFIG_SPL_STACK 0x318000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#define CONFIG_SPL_STACK 0x318000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* SerialFlash */
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#define CONFIG_SPL_STACK 0x218000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#define CONFIG_SPL_STACK 0x218000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#define CONFIG_SPL_STACK 0x218000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 16 * 1024 + CONFIG_SYS_MALLOC_F_LEN - \
- GENERATED_GBL_DATA_SIZE)
#endif
#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
/* Platform/Board specific defs */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#endif
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#endif
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
#include <linux/sizes.h>
-/* Start just below the second bank so we don't clobber it during reloc */
-#define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_SDRAM_SIZE SZ_8M
* leaving the correct space for initial global data structure above that
* address while providing maximum stack area below.
*/
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
/* Defines for SPL */
#define CONFIG_SMDK5420 /* which is in a SMDK5420 */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
/* USB */
#define CONFIG_USB_XHCI_EXYNOS
#define CONFIG_SAMSUNG_ONENAND 1
#define CONFIG_SYS_ONENAND_BASE 0xE7100000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
-
/*
* Ethernet Contoller driver
*/
#define RESERVE_BLOCK_SIZE (512)
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
-#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
-
/* Ethernet Controllor Driver */
#ifdef CONFIG_CMD_NET
#define CONFIG_ENV_SROM_BANK 1
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#endif
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
-#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
- GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
/* Mem test settings */
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */
-#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \
- GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
/* Mem test settings */
*/
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
/*
* I2C
* phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage
* in U-Boot pre-reloc is higher than in SPL.
*/
-#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR
-#else
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK
-#endif
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000
#define CONFIG_SYS_INIT_RAM_SIZE 0x40000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE \
- + 0x100000)
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_SP_ADDR)
/*
* U-Boot environment configurations
#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size used area in RAM*/
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
/* USB Configs */
* low-level initialization and rely on configuration provided by the Samsung
* bootloader. New images are loaded at the same address for compatibility.
*/
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* FIXME: This should be loaded from device tree... */
/* Extra Commands */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
- CONFIG_SYS_MALLOC_LEN - \
- GENERATED_GBL_DATA_SIZE)
-
/* USB Configs */
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_SYS_FLASH_BASE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
-
/*
* Configuration of the external SDRAM memory
*/
#define CONFIG_SYS_FLASH_BASE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
-
/*
* Configuration of the external SDRAM memory
*/
#define CONFIG_SYS_FLASH_BASE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
-
/*
* Configuration of the external SDRAM memory
*/
#define CONFIG_SYS_BOOTMAPSZ SZ_4M + SZ_2M
#define CONFIG_SYS_FLASH_BASE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
/*
* Configuration of the external SDRAM memory
#define CONFIG_SYS_BOOTMAPSZ SZ_16M
#define CONFIG_SYS_FLASH_BASE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
#define CONFIG_SYS_HZ_CLOCK 1000000
#define CONFIG_SYS_BOOTMAPSZ SZ_16M
#define CONFIG_SYS_FLASH_BASE 0x08000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
#define CONFIG_SYS_HZ_CLOCK 1000000
#define CONFIG_SYS_BOOTMAPSZ (SZ_16M + SZ_8M)
#define CONFIG_SYS_FLASH_BASE 0x90000000
-#define CONFIG_SYS_INIT_SP_ADDR 0x24040000
#define CONFIG_SYS_HZ_CLOCK 1000000
* Configuration of the external SRAM memory used by U-Boot
*/
#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/*
* Console I/O buffer size
#include "rcar-gen2-common.h"
-#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
#define STACK_AREA_SIZE 0x00100000
#define LOW_LEVEL_MERAM_STACK \
- (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
+ (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
#define RCAR_GEN2_SDRAM_BASE 0x40000000
/* MISC */
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
/* U-Boot Load Address */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* GMAC related configs */
/* FIXME: this may be larger on some SoCs */
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
/*
* Boot info
*/
-#define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */
/*
* Hardware drivers support
* leaving the correct space for initial global data structure above
* that address while providing maximum stack area below.
*/
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_SYS_BOOTM_LEN SZ_32M
/*
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_BOOTMAPSZ 0x10000000
#ifndef CONFIG_ARM64
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#endif
-#ifndef CONFIG_ARM64
/* Defines for SPL */
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#endif
#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* SMP Spin Table Definitions */
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
/**
* Platform/Board specific defs
*/
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#ifndef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
-#endif
-
/* If DM_I2C, enable non-DM I2C support */
/*
/* Memory Configuration */
#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_ISW_ENTRY_ADDR - \
- GENERATED_GBL_DATA_SIZE)
#ifdef CONFIG_SYS_MALLOC_F_LEN
#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
#define __TOTAL_COMPUTE_H
/* Link Definitions */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)
/*
* Serial Port
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/*
* All the defines above are for the TQMa6 SoM
*
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- - GENERATED_GBL_DATA_SIZE)
-
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- - GENERATED_GBL_DATA_SIZE)
-
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \
9600, 19200, 38400, 57600, 115200, \
230400, 460800, 500000, 576000, \
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
#endif /* __CONFIG_H * */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* PMIC */
#define CONFIG_POWER_PFUZE3000
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
#define CONFIG_SYS_BOOTMAPSZ 0x20000000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
-
/* only for SPL */
#define CONFIG_SPL_STACK (0x00100000)
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
+#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#endif /* __CONFIG_H */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#if defined(CONFIG_ENV_IS_IN_MMC)
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
/* Link Definitions */
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
#else
/* ATF loads u-boot here for BASE_FVP model */
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
#endif
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* additions for new relocation code */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/* Basic environment settings */
#define BOOT_TARGET_DEVICES(func) \
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_RANGE (512 * 1024)
#endif
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x4000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
-
/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment organization */
#endif /* __CONFIG_H * */
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* VDD voltage 1.65 - 1.95 */
#define CONFIG_SYS_SD_VOLTAGE 0x00000080
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* environment organization */
#define CONFIG_SYS_FSL_USDHC_NUM 1
#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \
- - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_RTC_DS1374
/*
#define GICD_BASE 0xF9000000
#define GICR_BASE 0xF9080000
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-
/* Serial setup */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 4800, 9600, 19200, 38400, 57600, 115200 }
#include <configs/xilinx_versal_mini.h>
-#undef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
-
#endif /* __CONFIG_VERSAL_MINI_QSPI_H */
#define GICD_BASE 0xF9010000
#define GICC_BASE 0xF9020000
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-
/* Serial setup */
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 4800, 9600, 19200, 38400, 57600, 115200 }
/* Undef unneeded configs */
#undef CONFIG_EXTRA_ENV_SETTINGS
-#undef CONFIG_SYS_INIT_SP_ADDR
#endif /* __CONFIG_ZYNQMP_MINI_H */
#include <configs/xilinx_zynqmp_mini.h>
-#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-
#endif /* __CONFIG_ZYNQMP_MINI_EMMC_H */
#define CONFIG_SYS_SDRAM_SIZE 0x1000000
#define CONFIG_SYS_SDRAM_BASE 0x0
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000)
#endif /* __CONFIG_ZYNQMP_MINI_NAND_H */
#include <configs/xilinx_zynqmp_mini.h>
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
-
#endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
/* Environment is in stored in the eMMC boot partition */
/* USB Configs */
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/* Extend size of kernel image for uncompression */
#ifndef __SYSTEM_CONSTANTS_H__
#define __SYSTEM_CONSTANTS_H__
+/*
+ * The most common case for our initial stack pointer address is to
+ * say that we have defined a static intiial ram address location and
+ * size and from that we subtract the generated global data size.
+ */
+#ifdef CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR
+#define SYS_INIT_SP_ADDR CONFIG_CUSTOM_SYS_INIT_SP_ADDR
+#else
+#ifdef CONFIG_MIPS
+#define SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET)
+#else
+#define SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#endif
+#endif
+
#endif