/ {
model = "R2D";
compatible = "renesas,r2d", "renesas,sh7751";
+
+ pci@fe200000 {
+ compatible = "renesas,pci-sh7751";
+ device_type = "pci";
+ reg = <0 0xfe200000 0 0x1000>;
+ status = "okay";
+
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x01000000 0 0xfe240000 0 0xfe240000 0 0x00040000
+ 0x02000000 0 0xfd000000 0 0xfd000000 0 0x01000000>;
+ };
};
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
-#include <asm/pci.h>
int checkboard(void)
{
}
}
-static struct pci_controller hose;
-void pci_init_board(void)
-{
- pci_sh7751_init(&hose);
-}
-
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
CONFIG_SYS_FLASH_CFI=y
CONFIG_RTL8139=y
CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y
/*
* SuperH PCI Bridge Configration
*/
-#define CONFIG_SH4_PCI
#define CONFIG_SH7751_PCI
-#define CONFIG_PCI_SCAN_SHOW 1
-#define __mem_pci
-
-#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
-#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
-#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */
-#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */
-#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
-#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
-#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
#endif /* __CONFIG_H */