config TARGET_VEXPRESS_CA15_TC2
bool "Support vexpress_ca15_tc2"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
config TARGET_VEXPRESS_CA5X2
bool "Support vexpress_ca5x2"
source "arch/arm/cpu/armv7/zynq/Kconfig"
+source "arch/arm/cpu/armv7/Kconfig"
+
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
--- /dev/null
+if CPU_V7
+
+config CPU_V7_HAS_NONSEC
+ bool
+
+config CPU_V7_HAS_VIRT
+ bool
+
+config ARMV7_NONSEC
+ boolean "Enable support for booting in non-secure mode" if EXPERT
+ depends on CPU_V7_HAS_NONSEC
+ default y
+ ---help---
+ Say Y here to enable support for booting in non-secure / SVC mode.
+
+config ARMV7_VIRT
+ boolean "Enable support for hardware virtualization" if EXPERT
+ depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
+ default y
+ ---help---
+ Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+
+endif
config TARGET_ARNDALE
bool "Exynos5250 Arndale board"
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUPPORT_SPL
select OF_CONTROL if !SPL_BUILD
config MACH_SUN7I
bool "sun7i (Allwinner A20)"
select CPU_V7
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
select SUPPORT_SPL
config MACH_SUN8I
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
-#define CONFIG_ARMV7_VIRT
-
#endif /* __CONFIG_H */
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
-#define CONFIG_ARMV7_VIRT 1
-#define CONFIG_ARMV7_NONSEC 1
#define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_SYSFLAGS_ADDR 0x1c010030
#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
-#define CONFIG_ARMV7_VIRT
-
#endif