armv8: fsl-layerscape: fix SEC QI ICID setup

The SEC QI ICID setup in the QIIC_LS register is actually an offset
that is being added to the ICID coming from the qman portal. Setting
it with a non-zero value breaks SMMU setup as the resulting ICID is
not known. On top of that, the SEC QI ICID must match the qman portal
ICIDs in order to share the isolation context.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
index 0e8649427e9c88033b7a8ffeafa9e766ad0be6a8..3bd993bebfbc0ee85cca479a53f29ebf8a5e6dd8 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
@@ -43,7 +43,7 @@ struct icid_id_table icid_tbl[] = {
        SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
        SET_QE_ICID(FSL_QE_STREAM_ID),
 #ifdef CONFIG_FSL_CAAM
-       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
        SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
        SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
        SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 2da9adab5b919671a13de269e09b08a0a2bf07dc..abd847b5be025e1aa182b9ea36750a1adc18d0cb 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -41,7 +41,7 @@ struct icid_id_table icid_tbl[] = {
        SET_ETR_ICID(FSL_ETR_STREAM_ID),
        SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
 #ifdef CONFIG_FSL_CAAM
-       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+       SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
        SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
        SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
        SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index f375fe7115c1a49084f2b6327d3bddd4400178d1..e7a880126265512924a7fb0aa00cea2881cfc218 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -93,8 +93,7 @@ void fdt_fixup_icid(void *blob);
 
 #define SET_SEC_QI_ICID(streamid) \
        SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
-               (((streamid) << 16) | (streamid)), \
-               offsetof(ccsr_sec_t, qilcr_ls) + \
+               0, offsetof(ccsr_sec_t, qilcr_ls) + \
                CONFIG_SYS_FSL_SEC_ADDR, \
                CONFIG_SYS_FSL_SEC_ADDR)