*/
#include <common.h>
+#include <blk.h>
#include <cpu_func.h>
+#include <dm.h>
#include <log.h>
#include <pci.h>
#include <command.h>
#include <sata.h>
#include <libata.h>
#include <sata.h>
-#include <linux/delay.h>
-
-#if CONFIG_IS_ENABLED(BLK)
-#include <dm.h>
-#include <blk.h>
#include <dm/device-internal.h>
-#endif
+#include <linux/delay.h>
#include "sata_sil.h"
/*
* SATA interface between low level driver and command layer
*/
-#if !CONFIG_IS_ENABLED(BLK)
-ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
-{
- struct sil_sata *sata = (struct sil_sata *)sata_dev_desc[dev].priv;
-#else
static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
void *buffer)
{
struct sil_sata_priv *priv = dev_get_plat(dev);
int port_number = priv->port_num;
struct sil_sata *sata = priv->sil_sata_desc[port_number];
-#endif
ulong rc;
if (sata->lba48)
/*
* SATA interface between low level driver and command layer
*/
-#if !CONFIG_IS_ENABLED(BLK)
-ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
-{
- struct sil_sata *sata = (struct sil_sata *)sata_dev_desc[dev].priv;
-#else
ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
const void *buffer)
{
struct sil_sata_priv *priv = dev_get_plat(dev);
int port_number = priv->port_num;
struct sil_sata *sata = priv->sil_sata_desc[port_number];
-#endif
ulong rc;
if (sata->lba48) {
return rc;
}
-#if !CONFIG_IS_ENABLED(BLK)
-static int sil_init_sata(int dev)
-{
-#else
static int sil_init_sata(struct udevice *uc_dev, int dev)
{
struct sil_sata_priv *priv = dev_get_plat(uc_dev);
-#endif
struct sil_sata *sata;
void *port;
u32 tmp;
memset((void *)sata, 0, sizeof(struct sil_sata));
/* Save the private struct to block device struct */
-#if !CONFIG_IS_ENABLED(BLK)
- sata_dev_desc[dev].priv = (void *)sata;
- sata->devno = sata_info.devno;
-#else
priv->sil_sata_desc[dev] = sata;
priv->port_num = dev;
sata->devno = uc_dev->parent;
-#endif
sata->id = dev;
sata->port = port;
sprintf(sata->name, "SATA#%d", dev);
return 0;
}
-#if !CONFIG_IS_ENABLED(BLK)
-/*
- * SATA interface between low level driver and command layer
- */
-int init_sata(int dev)
-{
- static int init_done, idx;
- pci_dev_t devno;
- u16 word;
-
- if (init_done == 1 && dev < sata_info.maxport)
- goto init_start;
-
- init_done = 1;
-
- /* Find PCI device(s) */
- devno = pci_find_devices(supported, idx++);
- if (devno == -1)
- return 1;
-
- pci_read_config_word(devno, PCI_DEVICE_ID, &word);
-
- /* get the port count */
- word &= 0xf;
-
- sata_info.portbase = 0;
- sata_info.maxport = sata_info.portbase + word;
- sata_info.devno = devno;
-
- /* Read out all BARs */
- sata_info.iobase[0] = (ulong)pci_map_bar(devno,
- PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
- sata_info.iobase[1] = (ulong)pci_map_bar(devno,
- PCI_BASE_ADDRESS_2, PCI_REGION_MEM);
-
- /* mask out the unused bits */
- sata_info.iobase[0] &= 0xffffff80;
- sata_info.iobase[1] &= 0xfffffc00;
-
- /* Enable Bus Mastering and memory region */
- pci_write_config_word(devno, PCI_COMMAND,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-
- /* Check if mem accesses and Bus Mastering are enabled. */
- pci_read_config_word(devno, PCI_COMMAND, &word);
- if (!(word & PCI_COMMAND_MEMORY) ||
- (!(word & PCI_COMMAND_MASTER))) {
- printf("Error: Can not enable MEM access or Bus Mastering.\n");
- debug("PCI command: %04x\n", word);
- return 1;
- }
-
- /* GPIO off */
- writel(0, (void *)(sata_info.iobase[0] + HOST_FLASH_CMD));
- /* clear global reset & mask interrupts during initialization */
- writel(0, (void *)(sata_info.iobase[0] + HOST_CTRL));
-
-init_start:
- return sil_init_sata(dev);
-}
-
-int reset_sata(int dev)
-{
- return 0;
-}
-
-/*
- * SATA interface between low level driver and command layer
- */
-int scan_sata(int dev)
-{
- struct sil_sata *sata = (struct sil_sata *)sata_dev_desc[dev].priv;
-#else
static int scan_sata(struct udevice *blk_dev, int dev)
{
struct blk_desc *desc = dev_get_uclass_plat(blk_dev);
struct sil_sata_priv *priv = dev_get_plat(blk_dev);
struct sil_sata *sata = priv->sil_sata_desc[dev];
-#endif
unsigned char serial[ATA_ID_SERNO_LEN + 1];
unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
unsigned char product[ATA_ID_PROD_LEN + 1];
/* Product model */
ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
-#if !CONFIG_IS_ENABLED(BLK)
- memcpy(sata_dev_desc[dev].product, serial, sizeof(serial));
- memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware));
- memcpy(sata_dev_desc[dev].vendor, product, sizeof(product));
- /* Totoal sectors */
- sata_dev_desc[dev].lba = ata_id_n_sectors(id);
-#ifdef CONFIG_LBA48
- sata_dev_desc[dev].lba48 = sata->lba48;
-#endif
-#else
memcpy(desc->product, serial, sizeof(serial));
memcpy(desc->revision, firmware, sizeof(firmware));
memcpy(desc->vendor, product, sizeof(product));
#ifdef CONFIG_LBA48
desc->lba48 = sata->lba48;
#endif
-#endif
#ifdef DEBUG
ata_dump_id(id);
return 0;
}
-#if CONFIG_IS_ENABLED(BLK)
static const struct blk_ops sata_sil_blk_ops = {
.read = sata_read,
.write = sata_write,
};
U_BOOT_PCI_DEVICE(sil_ahci_pci, supported);
-#endif