CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_SCSI=y
+CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_NAND_MXC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_OF_LIBFDT=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
CONFIG_DM_REGULATOR=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_MII=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RN5T567=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_PINCTRL_IMX7=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RN5T567=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_SCSI=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
CONFIG_PWM_IMX=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
CONFIG_PWM_IMX=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_OF_LIBFDT=y
CONFIG_MII=y
CONFIG_PCI=y
CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_MII=y
CONFIG_PCI=y
CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_MII=y
CONFIG_PCI=y
CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RESET=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RESET=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_RTC_M41T62=y
+CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_USB=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_FS_EXT4=y
CONFIG_FS_FAT=y
CONFIG_OF_LIBFDT=y
CONFIG_MII=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0xB6000000
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_MII=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0xF4000000
+CONFIG_MXC_UART=y
CONFIG_OF_LIBFDT=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_OF_LIBFDT=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_EHCI_MX5=y
CONFIG_USB_STORAGE=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_OF_LIBFDT=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_DM=y
# CONFIG_MMC is not set
CONFIG_FSL_USDHC=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_HOST_ETHER=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SOFT_SPI=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_QSPI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_PCI=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_PHY_ATHEROS=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
CONFIG_CONS_INDEX=4
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RESET=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX7=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_NAND_MXS=y
CONFIG_PHYLIB=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_DM_THERMAL=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_OF_LIBFDT=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_OF_LIBFDT=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_OF_LIBFDT=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_OF_LIBFDT=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_OF_LIBFDT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_EHCI_MX5=y
CONFIG_OF_LIBFDT=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
CONFIG_OPTEE=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
CONFIG_OPTEE=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_DFU_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT=y
CONFIG_MV88E6352_SWITCH=y
CONFIG_MII=y
CONFIG_PCI=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_MXC_SPI=y
CONFIG_OF_LIBFDT=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_MII=y
+CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
config MXC_UART
bool "IMX serial port support"
- depends on MX5 || MX6 || MX7 || IMX8M
+ depends on ARCH_MX25 || ARCH_MX31 || TARGET_APF27 || TARGET_FLEA3 || TARGET_MX35PDK \
+ || MX5 || MX6 || MX7 || IMX8M
help
If you have a machine based on a Motorola IMX CPU you
can enable its onboard serial port by enabling this option.
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_MXC_UART
-
/* SATA Configs */
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
/*
* Serial Driver
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/*
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/* MMC Configs */
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Serial console */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#endif
/* UART */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* USB Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_MXC_UART
-
#ifdef CONFIG_SPL
#include "imx6_spl.h"
#endif
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_MXC_UART
-
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
/*
* UART (console)
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART3_BASE
/* allow to overwrite serial and ethaddr */
#define CONFIG_IMX_THERMAL
/* Serial */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
#if !defined(CONFIG_SPI_FLASH) && defined(CONFIG_SPL_NAND_SUPPORT)
/*
* Serial Driver info
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/*
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
/* Monitor Command Prompt */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
(PHYS_SDRAM_SIZE >> 1))
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
/* Monitor Command Prompt */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
/*
* Serial Driver
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/*
/* Memory Test */
/* Serial Info */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* No NOR flash present */
/*
* UART (console)
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* allow to overwrite serial and ethaddr */
*/
#define CONFIG_FSL_IIM
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* PMIC Controller */
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#define CONFIG_REVISION_TAG
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#define CONFIG_IMX_THERMAL
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_MXC_UART
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)
-#define CONFIG_MXC_UART
#ifdef CONFIG_SERIAL_CONSOLE_UART1
#if defined(CONFIG_MX6SL)
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART4_BASE
/* MMC Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_MXC_UART
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* MMC Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_EXTRA_ENV_SETTINGS \
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#ifdef CONFIG_IMX_BOOTAUX
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
#define CONFIG_SYS_MAXARGS 32
/* UART */
-#define CONFIG_MXC_UART
/* MMC */
#define CONFIG_USBD_HS
#define CONFIG_NETCONSOLE
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/* I2C Configs */
#define CONFIG_LBA48
/* UART */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/* USB Configs */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* UART Configs */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* SF Configs */
#define CONFIG_IMX_THERMAL
/* Serial */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONSOLE_DEV "ttymxc3"
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configuration */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR
/* MMC Configs */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
(PHYS_SDRAM_SIZE >> 1))
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
/* Monitor Command Prompt */
*/
/* UART config */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C config */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/* MMC Configuration */
#define CONFIG_IMX_THERMAL
/* Serial */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* Size of malloc() pool */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
#define CONFIG_SYS_BOOTMAPSZ 0x10000000
/* Serial console */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
/* Framebuffer */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
* Hardware drivers
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/*
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/* SATA Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
-#define CONFIG_MXC_UART
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
#define CONFIG_SYS_CBSIZE 512
/* UART */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* SD/MMC */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* MMC Configs */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 << 20)
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR
/* MMC Configs */
/*
* Serial
*/
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
/*