x86: quark: Enable on-chip ethernet controllers

Intel Quark SoC integrates two 10/100 ethernet controllers which can
be connected to an external RMII PHY. The MAC IP is from Designware.
Enable this support with the existing U-Boot Designware MAC driver
so that the ethernet port on Intel Galileo board can be used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index dccf7ac5f5cbb08bdb417b9e56fccc2ae1e344df..25edcf71cb5a08a4a7955ced018907397b29b681 100644 (file)
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <mmc.h>
+#include <netdev.h>
+#include <phy.h>
 #include <asm/io.h>
 #include <asm/pci.h>
 #include <asm/post.h>
@@ -116,3 +118,20 @@ int cpu_mmc_init(bd_t *bis)
        return pci_mmc_init("Quark SDHCI", mmc_supported,
                            ARRAY_SIZE(mmc_supported));
 }
+
+int cpu_eth_init(bd_t *bis)
+{
+       u32 base;
+       int ret0, ret1;
+
+       pci_read_config_dword(QUARK_EMAC0, PCI_BASE_ADDRESS_0, &base);
+       ret0 = designware_initialize(base, PHY_INTERFACE_MODE_RMII);
+
+       pci_read_config_dword(QUARK_EMAC1, PCI_BASE_ADDRESS_0, &base);
+       ret1 = designware_initialize(base, PHY_INTERFACE_MODE_RMII);
+
+       if (ret0 < 0 && ret1 < 0)
+               return -1;
+       else
+               return 0;
+}

diff --git a/include/configs/galileo.h b/include/configs/galileo.h
index d745f4eb89baecea93949c94f471cead0244ccb2..65a2c3e0162e6573cec3f4f2557ebab921e731d9 100644 (file)
--- a/include/configs/galileo.h
+++ b/include/configs/galileo.h
@@ -57,4 +57,9 @@
 #define CONFIG_MMC_SDMA
 #define CONFIG_CMD_MMC
 
+/* 10/100M Ethernet support */
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_ALTDESCRIPTOR
+#define CONFIG_PHYLIB
+
 #endif /* __CONFIG_H */