armv7: rename cache related CONFIG flags

Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF

Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
 * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
 * Changed all three flags to the final names suggested as above
   and accordingly changed the commit message

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 3c5f3ef5fab1ca6f5bb2bce45070487f7cd302d5..200a80018578242b52a2b3ea463ec704e4295fa8 100644 (file)
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -512,10 +512,10 @@ fiq:
        .align 5
 .global arm1136_cache_flush
 arm1136_cache_flush:
-#if !defined(CONFIG_SYS_NO_ICACHE)
+#if !defined(CONFIG_SYS_ICACHE_OFF)
                mcr     p15, 0, r1, c7, c5, 0   @ invalidate I cache
 #endif
-#if !defined(CONFIG_SYS_NO_DCACHE)
+#if !defined(CONFIG_SYS_DCACHE_OFF)
                mcr     p15, 0, r1, c7, c14, 0  @ invalidate D cache
 #endif
                mov     pc, lr                  @ back to caller

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index a01e0d605ff8fc6397687cc6d7c8de9508143b21..bc4238f6d8656f54417c80e98e49b97c478d1c9e 100644 (file)
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -35,9 +35,6 @@
 #include <command.h>
 #include <asm/system.h>
 #include <asm/cache.h>
-#ifndef CONFIG_L2_OFF
-#include <asm/arch/sys_proto.h>
-#endif
 
 static void cache_flush(void);
 

diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index ef9959e6eefc53144707026f2e4c7df7bdd3a5f5..26b41b4c3bdd9291b1b6fc3f7c4f32927ba11b07 100644 (file)
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -70,7 +70,7 @@ typedef       struct  global_data {
        unsigned long   irq_sp;         /* irq stack pointer */
        unsigned long   start_addr_sp;  /* start_addr_stackpointer */
        unsigned long   reloc_off;
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
        unsigned long   tlb_addr;
 #endif
        void            **jt;           /* jump table */

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 03b1b5e4af803a029b7ca24660365d77dce49f4f..f993d743e0712ea336e8d57187ad2216170b08a8 100644 (file)
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,9 +39,7 @@ GLCOBJS       += div0.o
 COBJS-y        += board.o
 COBJS-y        += bootm.o
 COBJS-y        += cache.o
-ifndef CONFIG_SYS_NO_CP15_CACHE
 COBJS-y        += cache-cp15.o
-endif
 COBJS-y        += interrupts.o
 COBJS-y        += reset.o
 SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o

diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 169dfebcf157432218f4953550bdb1dea5eca0c2..4f88f5823b1e6a24226914dbeb3ad3c5b24fec51 100644 (file)
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -326,7 +326,7 @@ void board_init_f (ulong bootflag)
        debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
 #endif /* CONFIG_PRAM */
 
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
        /* reserve TLB table */
        addr -= (4096 * 4);
 

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index d9175f058327fabf4f91ee0d751a043e4b0c0133..ba73fb925cfc8372bdcf18fa04a78304b7255102 100644 (file)
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -24,7 +24,7 @@
 #include <common.h>
 #include <asm/system.h>
 
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 
 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
 #define CACHE_SETUP    0x1a
@@ -118,7 +118,7 @@ static void cache_disable(uint32_t cache_bit)
 }
 #endif
 
-#ifdef CONFIG_SYS_NO_ICACHE
+#ifdef CONFIG_SYS_ICACHE_OFF
 void icache_enable (void)
 {
        return;
@@ -150,7 +150,7 @@ int icache_status(void)
 }
 #endif
 
-#ifdef CONFIG_SYS_NO_DCACHE
+#ifdef CONFIG_SYS_DCACHE_OFF
 void dcache_enable (void)
 {
        return;

diff --git a/board/armltd/integrator/split_by_variant.sh b/board/armltd/integrator/split_by_variant.sh
index d869dd2b75be2a60f397e1569dca15ccd691f843..19fc832c2a06f1fe3bda585c9ef9079130c9f717 100755 (executable)
--- a/board/armltd/integrator/split_by_variant.sh
+++ b/board/armltd/integrator/split_by_variant.sh
@@ -103,16 +103,16 @@ case "$cpu" in
 #undef CONFIG_CM_INIT  /* CM may not have initialization reg */
 #undef CONFIG_CM_TCRAM /* CM may not have TCRAM */
 /* May not be processor without cache support */
-#define CONFIG_SYS_NO_ICACHE 1
-#define CONFIG_SYS_NO_DCACHE 1
+#define CONFIG_SYS_ICACHE_OFF 1
+#define CONFIG_SYS_DCACHE_OFF 1
 _EOF
        ;;
 
        arm720t)
        cat >> ${config_file} << _EOF
 /* May not be processor without cache support */
-#define CONFIG_SYS_NO_ICACHE 1
-#define CONFIG_SYS_NO_DCACHE 1
+#define CONFIG_SYS_ICACHE_OFF 1
+#define CONFIG_SYS_DCACHE_OFF 1
 _EOF
        ;;
 esac

diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 75924f8aac628ea01e73eed95b994f9a4038e5f5..605112083ee0286ff29af03309f5826fba893dbb 100644 (file)
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -345,7 +345,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        printf("ip_addr     = %pI4\n", &bd->bi_ip_addr);
 #endif
        printf("baudrate    = %d bps\n", bd->bi_baudrate);
-#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
        print_num("TLB addr", gd->tlb_addr);
 #endif
        print_num("relocaddr", gd->relocaddr);

diff --git a/include/configs/B2.h b/include/configs/B2.h
index 7846a925c8649d5fa5f84f32b97d3eeaaa842add..e181fa88bffeb849366e806eedfbc1a0a26f2452 100644 (file)
--- a/include/configs/B2.h
+++ b/include/configs/B2.h
@@ -38,7 +38,8 @@
 #define CONFIG_B2                      1       /* on an B2 Board      */
 #define CONFIG_ARM_THUMB       1       /* this is an ARM7TDMI */
 #undef  CONFIG_ARM7_REVD               /* disable ARM720 REV.D Workarounds */
-#define CONFIG_SYS_NO_CP15_CACHE
+#define CONFIG_SYS_ICACHE_OFF
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_ARCH_CPU_INIT
 
 #define CONFIG_S3C44B0_CLOCK_SPEED     75 /* we have a 75Mhz S3C44B0*/

diff --git a/include/configs/assabet.h b/include/configs/assabet.h
index 5cd1836434f43029840701d844ba288563be58c1..dc9bd88acaf835ff735f648ed1b3d3b9fb2e9519 100644 (file)
--- a/include/configs/assabet.h
+++ b/include/configs/assabet.h
@@ -38,7 +38,7 @@
 
 #undef CONFIG_USE_IRQ
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 #define CONFIG_CMDLINE_TAG      1      /* enable passing of ATAGs      */
 #define CONFIG_SETUP_MEMORY_TAGS 1

diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h
index 7f8324915ccc7f97a0d7ed15265cd95e4f1493b9..f0ac79a25cbb135a592dbb8c79d68e0e2446a5bd 100644 (file)
--- a/include/configs/ca9x4_ct_vxp.h
+++ b/include/configs/ca9x4_ct_vxp.h
@@ -41,7 +41,7 @@
 
 #define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS       1
-#define CONFIG_L2_OFF                  1
+#define CONFIG_SYS_L2CACHE_OFF         1
 #define CONFIG_INITRD_TAG              1
 
 #define CONFIG_OF_LIBFDT               1

diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index 9696487907dd029b500de3b2c793448c3d64f20d..7e179beef7b7c5d54b1e24283029209e518f2c40 100644 (file)
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -43,7 +43,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index c21af3817f431ea16b810348f31ba17c7fc079e2..21a8e648e3a633169d6a2232e7390060b734247c 100644 (file)
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -38,7 +38,7 @@
 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 #define        CONFIG_SYS_TEXT_BASE            0x0
 /*
  * Size of malloc() pool

diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index 505740c4d41e2302099170613366025a93f056ae..dcfbc6e686e92584b554d0c9a007f094053fca8a 100644 (file)
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -44,7 +44,7 @@
                                        /* for timer/console/ethernet       */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 #define        CONFIG_SYS_TEXT_BASE    0x0
 /*
  * Hardware drivers

diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h
index 69c6420fe9d916b6c95f47730f9ea23c2bc265be..7d79d57faad72ecfe2c5965dcaf5c829490a9f12 100644 (file)
--- a/include/configs/dnp1110.h
+++ b/include/configs/dnp1110.h
@@ -42,7 +42,7 @@
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 571c3cb729da1847579f8c02fe2d1e050f1e9bee..a04ac4982ff5b9fe3b3cdecc12d323d6e1cd7cad 100644 (file)
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -38,7 +38,7 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_L2CACHE_OFF
 
 /*
  * Bootloader Components Configuration

diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h
index fb05727cde15fa7e3f2c5f865959edeb0008bce9..23a2efa846b99c635f3e89dc7687d5050d5686e4 100644 (file)
--- a/include/configs/evb4510.h
+++ b/include/configs/evb4510.h
@@ -43,7 +43,8 @@
 #define CONFIG_ARM_THUMB       1       /* this is an ARM7TDMI   */
 #define CONFIG_S3C4510B                1       /* it's a S3C4510B chip  */
 #define CONFIG_EVB4510         1       /* on an EVB4510 Board   */
-#define CONFIG_SYS_NO_CP15_CACHE
+#define CONFIG_SYS_ICACHE_OFF
+#define CONFIG_SYS_DCACHE_OFF
 
 #define CONFIG_USE_IRQ
 #define CONFIG_STACKSIZE_IRQ    (4*1024)

diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h
index fd39ab4a033849665668055b5ea2b14518fb939e..9412daa27616557145a89e57ee04d5934ecd3cad 100644 (file)
--- a/include/configs/gcplus.h
+++ b/include/configs/gcplus.h
@@ -49,7 +49,7 @@
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 #define CONFIG_CMDLINE_TAG      1      /* enable passing of ATAGs      */
 #define CONFIG_SETUP_MEMORY_TAGS 1

diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 744d65c6e4d6e898c6402311d3d8c0128951d00a..2e4b3463748dd314c355b9b157c9fbb8d8f9da32 100644 (file)
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -43,7 +43,7 @@
 #define        CONFIG_SYS_TEXT_BASE    0x0
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Hardware drivers

diff --git a/include/configs/jornada.h b/include/configs/jornada.h
index 41b09aad9f1cf0689c5d8410fc9bb5fc3da78545..84ad2d874cad4d1c1b3e2e520d9dd520b8ddc1ad 100644 (file)
--- a/include/configs/jornada.h
+++ b/include/configs/jornada.h
@@ -32,7 +32,7 @@
 #define CONFIG_SYS_TEXT_BASE           0xC1F00000
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 #undef CONFIG_USE_IRQ
 
 /* Console setting */

diff --git a/include/configs/lart.h b/include/configs/lart.h
index 795cf3487b3a5bbd0323eea8cbf5d55de64d63d3..7316b23948c8945bf839c380f6f82d2ef5c5eacc 100644 (file)
--- a/include/configs/lart.h
+++ b/include/configs/lart.h
@@ -36,7 +36,7 @@
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index b7d53b65b787e62c10ca151165de0f993400f3c0..b6ee9190a3def186a502caf37bf66c6d3c2a3edc 100644 (file)
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -47,7 +47,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 207b20c2e335be8a63f60d63ea1b75487ab56450..fd42afcedca15cc9322c8237d4e110b211663ec4 100644 (file)
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -35,7 +35,7 @@
 
 #define CONFIG_SYS_TEXT_BASE   0x97800000
 
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_L2CACHE_OFF
 
 #include <asm/arch/imx-regs.h>
 /*

diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 78122a7ba87e7b3dd717842072d7d62d1989442c..5f5403558f6c0a61e4aae2f621a987346a454eb6 100644 (file)
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -29,7 +29,7 @@
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_L2CACHE_OFF
 
 #include <asm/arch/imx-regs.h>
 

diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index b4e7f411f350c4afbbc5b6cb266072a0c65e0b66..ab878f9eb73bd0cf966a3e64edd816014d933e5d 100644 (file)
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -46,7 +46,7 @@
 #define CONFIG_DISPLAY_BOARDINFO       1
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF                  1
+#define CONFIG_SYS_L2CACHE_OFF                 1
 
 /* Clock Defines */
 #define V_OSCK                 38400000        /* Clock output from T2 */

diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index 584a52b830228c362d8b2b6f5b8de28a42ecdfad..0ac407aad336e241063b06e1d7e092b1bbf1b317 100644 (file)
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -47,7 +47,7 @@
 #define CONFIG_DISPLAY_BOARDINFO       1
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF                  1
+#define CONFIG_SYS_L2CACHE_OFF                 1
 
 /* Clock Defines */
 #define V_OSCK                 38400000        /* Clock output from T2 */

diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h
index 9dbb4062ba0cc1421f4456ab1a7adf305c74ece1..ad8221390c447cde48feb7e96ca430b8618d0207 100644 (file)
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -44,7 +44,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index c1c7f80d4b24deac235130b3b1561101c2ac4279..e591d87db72f4974d3de2c8cd1f90559d991615e 100644 (file)
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -69,7 +69,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 59159849770bba81de2d53a9bcb3fedf75654418..bbe104b203ee3782dc7e0434d63a2789ee317d6b 100644 (file)
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -43,7 +43,7 @@
 #define CONFIG_DISPLAY_BOARDINFO
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_L2_OFF                  1
+#define CONFIG_SYS_L2CACHE_OFF         1
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define CONFIG_SYS_TEXT_BASE           0x44800000

diff --git a/include/configs/shannon.h b/include/configs/shannon.h
index c0e6643fb401c0a89cf389398ce36d97b65065ce..fce4121450cff61cfdc9b194f91bfb0e9c9b5e67 100644 (file)
--- a/include/configs/shannon.h
+++ b/include/configs/shannon.h
@@ -44,7 +44,7 @@
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index febce35ac1e4546b1ed9a9f9a0dcbc3830bae0b6..2d36d2374d996a7aedb8316d3f26c91403b747fd 100644 (file)
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -31,7 +31,7 @@
 #define CONFIG_ARMCORTEXA9             /* This is an ARM V7 CPU core */
 #define CONFIG_TEGRA2                  /* in a NVidia Tegra2 core */
 #define CONFIG_MACH_TEGRA_GENERIC      /* which is a Tegra generic machine */
-#define CONFIG_L2_OFF                  /* No L2 cache */
+#define CONFIG_SYS_L2CACHE_OFF         /* No L2 cache */
 
 #define CONFIG_ENABLE_CORTEXA9         /* enable CPU (A9 complex) */
 

diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index 2512f93f9c682940462f37b61f94903a2eff27be..ec052c41d19626d109818224ff1e62943a666634 100644 (file)
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -49,7 +49,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 #define RTC
 

diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 66795b531dcacf800893a88671e25b9626c87a88..50c920d0b89d08ca37bcb1682a77e05cd95788c0 100644 (file)
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -26,7 +26,7 @@
 
 
 #define CONFIG_MX51    /* in a mx51 */
-#define CONFIG_L2_OFF
+#define CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_TEXT_BASE   0x97800000
 
 #include <asm/arch/imx-regs.h>

diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index a75c426dfa21e32324bccafebb253a2bf5fae723..205e86c78b53d6441b6c3ee08548baef61d34887 100644 (file)
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -51,7 +51,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * select serial console configuration

diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index d61c2a4021220c9f55ec2306998a91ab749f956e..32544fed5801610ca26f88ef9c13d9f9ecc7de2b 100644 (file)
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -38,7 +38,7 @@
 #define        CONFIG_SYS_TEXT_BASE    0x0
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool; this lives below the uppermost 128 KiB which are

diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 1e03b0180d96c4417d5e0693ff525ae0830277f6..5f153e3538740c4c8cac4195e8876d95ecccf6ed 100644 (file)
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -48,7 +48,7 @@
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
 
 /* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_NO_DCACHE
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool