net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge

Current code expects bridge phy address at 0 which is not correct
expectation because bridge phy address is configurable.
That's why update the code to read reg property to figure it out
where bridge is and use it in phy creation code.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230915045043.4167628-1-tejas.arvind.bhumkar@amd.com

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index d50fd505e515aed85db1f323b6a1bec3b0d0d77e..63b3e46f101cefebbeb1b1e2cc05f0ae7470d3c0 100644 (file)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -807,7 +807,10 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
        ofnode_for_each_subnode(node, dev_ofnode(dev)) {
                node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0");
                if (ofnode_valid(node)) {
-                       phydev = phy_device_create(bus, 0,
+                       int gmiirgmii_phyaddr;
+
+                       gmiirgmii_phyaddr = ofnode_read_u32_default(node, "reg", 0);
+                       phydev = phy_device_create(bus, gmiirgmii_phyaddr,
                                                   PHY_GMII2RGMII_ID, false);
                        if (phydev)
                                phydev->node = node;