arm: dts: imx7d-sdb: add usdhc support

Add usdhc support

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts
index 7fab6f2b6ff3c89cbd841c3c060259a9f5393b08..85b83c351f64c1b5d18f01f0ba0b24833aec9c95 100644 (file)
--- a/arch/arm/dts/imx7d-sdb.dts
+++ b/arch/arm/dts/imx7d-sdb.dts
@@ -113,6 +113,55 @@
                                MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
                        >;
                };
+
+               pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
+                       fsl,pins = <
+                               MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x59 /* CD */
+                               MX7D_PAD_SD1_WP__GPIO5_IO1              0x59 /* WP */
+                               MX7D_PAD_SD1_RESET_B__GPIO5_IO2         0x59 /* vmmc */
+                               MX7D_PAD_GPIO1_IO08__SD1_VSELECT        0x59 /* VSELECT */
+                       >;
+               };
+
+               pinctrl_usdhc1: usdhc1grp {
+                       fsl,pins = <
+                               MX7D_PAD_SD1_CMD__SD1_CMD               0x59
+                               MX7D_PAD_SD1_CLK__SD1_CLK               0x19
+                               MX7D_PAD_SD1_DATA0__SD1_DATA0           0x59
+                               MX7D_PAD_SD1_DATA1__SD1_DATA1           0x59
+                               MX7D_PAD_SD1_DATA2__SD1_DATA2           0x59
+                               MX7D_PAD_SD1_DATA3__SD1_DATA3           0x59
+                       >;
+               };
+
+               pinctrl_usdhc2: usdhc2grp {
+                       fsl,pins = <
+                               MX7D_PAD_SD2_CMD__SD2_CMD       0x59
+                               MX7D_PAD_SD2_CLK__SD2_CLK       0x19
+                               MX7D_PAD_SD2_DATA0__SD2_DATA0   0x59
+                               MX7D_PAD_SD2_DATA1__SD2_DATA1   0x59
+                               MX7D_PAD_SD2_DATA2__SD2_DATA2   0x59
+                               MX7D_PAD_SD2_DATA3__SD2_DATA3   0x59
+                               MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21        0x19 /* WL_REG_ON */
+                               MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20        0x19 /* WL_HOST_WAKE */
+                       >;
+               };
+
+               pinctrl_usdhc3: usdhc3grp {
+                       fsl,pins = <
+                               MX7D_PAD_SD3_CMD__SD3_CMD               0x59
+                               MX7D_PAD_SD3_CLK__SD3_CLK               0x19
+                               MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
+                               MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
+                               MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
+                               MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
+                               MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
+                               MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
+                               MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
+                               MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
+                               MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
+                       >;
+               };
        };
 };
 
@@ -234,3 +283,27 @@
        pinctrl-0 = <&pinctrl_i2c4>;
        status = "okay";
 };
+
+&usdhc1 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+       cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_sd1_vmmc>;
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       non-removable;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};