Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
-- Console Interface:
- Depending on board, define exactly one serial port
- (CONFIG_8xx_CONS_SMC1 or CONFIG_8xx_CONS_SMC2),
- or switch off the serial console by defining
- CONFIG_8xx_CONS_NONE
-
- Note: if CONFIG_8xx_CONS_NONE is defined, the serial
- port routines must be defined elsewhere
- (i.e. serial_init(), serial_getc(), ...)
-
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
- CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
-
-- Console Rx buffer length
- With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
- the maximum receive buffer length for the SMC.
- This option is actual only for 8xx possible.
- If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
- must be defined, to setup the maximum idle timeout for
- the SMC.
- Autoboot Command:
CONFIG_BOOTCOMMAND
obj-$(CONFIG_CMD_IMMAP) += immap.o
obj-y += interrupts.o
obj-$(CONFIG_CMD_REGINFO) += reginfo.o
-obj-y += serial.o
obj-y += speed.o
on STiH410 SoC. This is a basic implementation, it supports
following baudrate 9600, 19200, 38400, 57600 and 115200.
+config MPC8XX_CONS
+ bool "Console driver for MPC8XX"
+ depends on 8xx
+ default y
+
+choice
+ prompt "Console port"
+ default 8xx_CONS_SMC1
+ depends on MPC8XX_CONS
+ help
+ Depending on board, select one serial port
+ (CONFIG_8xx_CONS_SMC1 or CONFIG_8xx_CONS_SMC2)
+
+config 8xx_CONS_SMC1
+ bool "SMC1"
+
+config 8xx_CONS_SMC2
+ bool "SMC2"
+
+endchoice
+
+config SYS_SMC_RXBUFLEN
+ int "Console Rx buffer length"
+ depends on MPC8XX_CONS
+ default 1
+ help
+ With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
+ the maximum receive buffer length for the SMC.
+ This option is actual only for 8xx possible.
+ If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
+ must be defined, to setup the maximum idle timeout for
+ the SMC.
+
+config SYS_MAXIDLE
+ int "maximum idle timeout"
+ depends on MPC8XX_CONS
+ default 0
+
+config SYS_BRGCLK_PRESCALE
+ int "BRG Clock Prescale"
+ depends on MPC8XX_CONS
+ default 1
+
+config SYS_SDSR
+ hex "SDSR Value"
+ depends on MPC8XX_CONS
+ default 0x83
+
+config SYS_SDMR
+ hex "SDMR Value"
+ depends on MPC8XX_CONS
+ default 0
+
endmenu
obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
obj-$(CONFIG_MVEBU_A3700_UART) += serial_mvebu_a3700.o
+obj-$(CONFIG_MPC8XX_CONS) += serial_mpc8xx.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */
-
#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
#define SMC_INDEX 0
#define PROFF_SMC PROFF_SMC1
#endif /* CONFIG_8xx_CONS_SMCx */
-#if !defined(CONFIG_SYS_SMC_RXBUFLEN)
-#define CONFIG_SYS_SMC_RXBUFLEN 1
-#define CONFIG_SYS_MAXIDLE 0
-#else
-#if !defined(CONFIG_SYS_MAXIDLE)
-#error "you must define CONFIG_SYS_MAXIDLE"
-#endif
-#endif
-
struct serialbuffer {
cbd_t rxbd; /* Rx BD */
cbd_t txbd; /* Tx BD */
divisor = (50 * 1000 * 1000 + 8 * 9600) / 16 / 9600;
}
-#ifdef CONFIG_SYS_BRGCLK_PRESCALE
divisor /= CONFIG_SYS_BRGCLK_PRESCALE;
-#endif
if (divisor <= 0x1000)
out_be32(&cp->cp_brgc1, ((divisor - 1) << 1) | CPM_BRG_EN);
out_be32(&im->im_siu_conf.sc_sdcr, 1);
/* clear error conditions */
-#ifdef CONFIG_SYS_SDSR
out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR);
-#else
- out_8(&im->im_sdma.sdma_sdsr, 0x83);
-#endif
/* clear SDMA interrupt mask */
-#ifdef CONFIG_SYS_SDMR
out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR);
-#else
- out_8(&im->im_sdma.sdma_sdmr, 0x00);
-#endif
/* Use Port B for SMCx instead of other functions. */
setbits_be32(&cp->cp_pbpar, IOPINS);
{
serial_register(&serial_smc_device);
}
-
-#endif /* CONFIG_8xx_CONS_NONE */
CONFIG_83XX_PCICLK
CONFIG_83XX_PCI_STREAMING
CONFIG_88F5182
-CONFIG_8xx_CONS_NONE
-CONFIG_8xx_CONS_SMC1
-CONFIG_8xx_CONS_SMC2
CONFIG_A003399_NOR_WORKAROUND
CONFIG_A008044_WORKAROUND
CONFIG_ACX517AKN
CONFIG_SYS_BR6_8M
CONFIG_SYS_BR6_PRELIM
CONFIG_SYS_BR7_PRELIM
-CONFIG_SYS_BRGCLK_PRESCALE
CONFIG_SYS_BUSCLK
CONFIG_SYS_CACHELINE_SHIFT
CONFIG_SYS_CACHE_ACR0
CONFIG_SYS_SDIO_BASE1
CONFIG_SYS_SDIO_BASE2
CONFIG_SYS_SDIO_BASE3
-CONFIG_SYS_SDMR
CONFIG_SYS_SDRAM
CONFIG_SYS_SDRAM1
CONFIG_SYS_SDRAM_BASE
CONFIG_SYS_SDRC_TR_VAL
CONFIG_SYS_SDRC_TR_VAL1
CONFIG_SYS_SDRC_TR_VAL2
-CONFIG_SYS_SDSR
CONFIG_SYS_SD_VOLTAGE
CONFIG_SYS_SEC_MON_ADDR
CONFIG_SYS_SEC_MON_OFFSET
CONFIG_SYS_SMC0_PULSE0_VAL
CONFIG_SYS_SMC0_SETUP0_VAL
CONFIG_SYS_SMC_CSR0_VAL
-CONFIG_SYS_SMC_RXBUFLEN
CONFIG_SYS_SMI_BASE
CONFIG_SYS_SPANSION_BASE
CONFIG_SYS_SPANSION_BOOT