ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitat...

Enable CVE_2017_5715 and since we have our own v7_arch_cp15_set_acr
function to setup the bits, we are able to override the settings.

Without this enabled, Linux kernel reports:
CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

With this enabled, Linux kernel reports:
CPU0: Spectre v2: using ICIALLU workaround

NOTE: This by itself does not enable the workaround for CPU1 (on
OMAP5 and DRA72/AM572 SoCs) and may require additional kernel patches.

Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 3bb1ecb58de0a14db73af27a8a0fe719e23ecd8c..77820cc8d1e48971dcc014bc7542a3dd3cf88528 100644 (file)
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -53,6 +53,7 @@ config OMAP54XX
        bool "OMAP54XX SoC"
        select ARM_ERRATA_798870
        select SYS_THUMB_BUILD
+       select ARM_CORTEX_A15_CVE_2017_5715
        imply NAND_OMAP_ELM
        imply NAND_OMAP_GPMC
        imply SPL_DISPLAY_PRINT