pico-imx6: Add Ethernet support

Add Ethernet support.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

diff --git a/board/technexion/pico-imx6/pico-imx6.c b/board/technexion/pico-imx6/pico-imx6.c
index 717f20d9d71f188889a0d06a50cf0fd7c2f06cda..2ae5af83d2f50892f148d92dbab0c8457d6abc61 100644 (file)
--- a/board/technexion/pico-imx6/pico-imx6.c
+++ b/board/technexion/pico-imx6/pico-imx6.c
@@ -17,6 +17,9 @@
 #include <asm/io.h>
 #include <linux/sizes.h>
 #include <common.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -24,6 +27,11 @@ DECLARE_GLOBAL_DATA_PTR;
        PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |                 \
        PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
 
+#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |                  \
+       PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+#define ETH_PHY_RESET          IMX_GPIO_NR(1, 26)
+
 int dram_init(void)
 {
        gd->ram_size = imx_ddr_size();
@@ -41,6 +49,39 @@ static void setup_iomux_uart(void)
        SETUP_IOMUX_PADS(uart1_pads);
 }
 
+static iomux_v3_cfg_t const enet_pads[] = {
+       IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_ENET_MDC__ENET_MDC    | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
+                  MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK |
+                  MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+       /* AR8035 PHY Reset */
+        IOMUX_PADS(PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+static void setup_iomux_enet(void)
+{
+       SETUP_IOMUX_PADS(enet_pads);
+
+       /* Reset AR8031 PHY */
+       gpio_request(ETH_PHY_RESET, "enet_phy_reset");
+       gpio_direction_output(ETH_PHY_RESET, 0);
+       udelay(500);
+       gpio_set_value(ETH_PHY_RESET, 1);
+}
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -48,6 +89,39 @@ int board_early_init_f(void)
        return 0;
 }
 
+int board_eth_init(bd_t *bis)
+{
+       setup_iomux_enet();
+
+       return cpu_eth_init(bis);
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+       unsigned short val;
+
+       /* To enable AR8035 ouput a 125MHz clk from CLK_25M */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
+
+       val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
+       val &= 0xffe7;
+       val |= 0x18;
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
+
+       /* introduce tx clock delay */
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
+       val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
+       val |= 0x0100;
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
+
+       if (phydev->drv->config)
+               phydev->drv->config(phydev);
+
+       return 0;
+}
+
 int overwrite_console(void)
 {
        return 1;

diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h
index d151da07f2709b12cbf247b08d83d0570d574ec3..d539b88bf778401b49e65ce6b72501352a5d96ef 100644 (file)
--- a/include/configs/pico-imx6.h
+++ b/include/configs/pico-imx6.h
@@ -129,4 +129,14 @@
 #define CONFIG_BOARD_SIZE_LIMIT                715776
 #define CONFIG_SYS_MMC_ENV_DEV         0
 
+/* Ethernet Configuration */
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE                   ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE            RGMII
+#define CONFIG_ETHPRIME                        "FEC"
+#define CONFIG_FEC_MXC_PHYADDR         1
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ATHEROS
+
 #endif                        /* __CONFIG_H * */