powerpc: dts: t1042d4rdb: add FMan v3 nodes

Add the FMan v3 nodes for the T1042D4RDB. The nodes are copied over with
little modification from the Linux kernel source code.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/arch/powerpc/dts/t1042d4rdb.dts b/arch/powerpc/dts/t1042d4rdb.dts
index 3584c06aa8d6103ef0b4e1a939b36542f65845eb..5e9fab7a1057884051edc3c30b41f8b021f26bb4 100644 (file)
--- a/arch/powerpc/dts/t1042d4rdb.dts
+++ b/arch/powerpc/dts/t1042d4rdb.dts
@@ -3,7 +3,7 @@
  * T1042D4RDB Device Tree Source
  *
  * Copyright 2013 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2021 NXP
  */
 
 /include/ "t104x.dtsi"
@@ -20,6 +20,57 @@
        };
 };
 
+&soc {
+       fman0: fman@400000 {
+               ethernet@e0000 {
+                       phy-handle = <&phy_sgmii_0>;
+                       phy-connection-type = "sgmii";
+               };
+
+               ethernet@e2000 {
+                       phy-handle = <&phy_sgmii_1>;
+                       phy-connection-type = "sgmii";
+               };
+
+               ethernet@e4000 {
+                       phy-handle = <&phy_sgmii_2>;
+                       phy-connection-type = "sgmii";
+               };
+
+               ethernet@e6000 {
+                       phy-handle = <&phy_rgmii_0>;
+                       phy-connection-type = "rgmii";
+               };
+
+               ethernet@e8000 {
+                       phy-handle = <&phy_rgmii_1>;
+                       phy-connection-type = "rgmii";
+               };
+
+               mdio0: mdio@fc000 {
+                       phy_sgmii_0: ethernet-phy@2 {
+                               reg = <0x02>;
+                       };
+
+                       phy_sgmii_1: ethernet-phy@3 {
+                               reg = <0x03>;
+                       };
+
+                       phy_sgmii_2: ethernet-phy@1 {
+                               reg = <0x01>;
+                       };
+
+                       phy_rgmii_0: ethernet-phy@4 {
+                               reg = <0x04>;
+                       };
+
+                       phy_rgmii_1: ethernet-phy@5 {
+                               reg = <0x05>;
+                       };
+               };
+       };
+};
+
 &espi0 {
        status = "okay";
        flash@0 {
@@ -30,3 +81,5 @@
                spi-max-frequency = <10000000>; /* input clock */
        };
 };
+
+/include/ "t1042si-post.dtsi"