x86: queensbay: Correct Topcliff device irqs

There are 4 usb ports on the Intel Crown Bay board, 2 of which are
connected to Topcliff usb host 0 and the other 2 connected to usb
host 1. USB devices inserted in the ports connected to usb host 1
cannot get detected due to wrong IRQ assigned to the controller.
Actually we need apply the PCI interrupt pin swizzling logic to all
devices on the Topcliff chipset when configuring the PIRQ routing.

This was observed on usb ports, but device 6 and 10 irqs are also
wrong. Correct them all together.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 87ed0f4f195e9dc89b11cdd09630fed913914060..b77c65a463728db16d3715a42080f44a2401842b 100644 (file)
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -180,29 +180,29 @@
                                 * Note on the Crown Bay board, Topcliff chipset
                                 * is connected to TunnelCreek PCIe port 0, so
                                 * its bus number is 1 for its PCIe port and 2
-                                * for its PCI devices per U-Boot currnet PCI
+                                * for its PCI devices per U-Boot current PCI
                                 * bus enumeration algorithm.
                                 */
                                PCI_BDF(1, 0, 0) INTA PIRQA
                                PCI_BDF(2, 0, 1) INTA PIRQA
                                PCI_BDF(2, 0, 2) INTA PIRQA
-                               PCI_BDF(2, 2, 0) INTB PIRQB
-                               PCI_BDF(2, 2, 1) INTB PIRQB
-                               PCI_BDF(2, 2, 2) INTB PIRQB
-                               PCI_BDF(2, 2, 3) INTB PIRQB
-                               PCI_BDF(2, 2, 4) INTB PIRQB
+                               PCI_BDF(2, 2, 0) INTB PIRQD
+                               PCI_BDF(2, 2, 1) INTB PIRQD
+                               PCI_BDF(2, 2, 2) INTB PIRQD
+                               PCI_BDF(2, 2, 3) INTB PIRQD
+                               PCI_BDF(2, 2, 4) INTB PIRQD
                                PCI_BDF(2, 4, 0) INTC PIRQC
                                PCI_BDF(2, 4, 1) INTC PIRQC
-                               PCI_BDF(2, 6, 0) INTD PIRQD
+                               PCI_BDF(2, 6, 0) INTD PIRQB
                                PCI_BDF(2, 8, 0) INTA PIRQA
                                PCI_BDF(2, 8, 1) INTA PIRQA
                                PCI_BDF(2, 8, 2) INTA PIRQA
                                PCI_BDF(2, 8, 3) INTA PIRQA
-                               PCI_BDF(2, 10, 0) INTB PIRQB
-                               PCI_BDF(2, 10, 1) INTB PIRQB
-                               PCI_BDF(2, 10, 2) INTB PIRQB
-                               PCI_BDF(2, 10, 3) INTB PIRQB
-                               PCI_BDF(2, 10, 4) INTB PIRQB
+                               PCI_BDF(2, 10, 0) INTB PIRQD
+                               PCI_BDF(2, 10, 1) INTB PIRQD
+                               PCI_BDF(2, 10, 2) INTB PIRQD
+                               PCI_BDF(2, 10, 3) INTB PIRQD
+                               PCI_BDF(2, 10, 4) INTB PIRQD
                                PCI_BDF(2, 12, 0) INTC PIRQC
                                PCI_BDF(2, 12, 1) INTC PIRQC
                                PCI_BDF(2, 12, 2) INTC PIRQC