mpc8640: Update the io_sel fields for PCI Express

Previously io_sel=0xe incorrect stated PCIE1 was enabled.  Also add
support for the mpc8640's PCIE2 interface.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
index 186936f23e830b189e6c350433b1f02496f67847..53236a36f81bd1d23be30ac1b2ab6dc73b053556 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
+++ b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c
@@ -138,7 +138,10 @@ static struct pci_info pci_config_info[] =
 {
        [LAW_TRGT_IF_PCIE_1] = {
                .cfg =   (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) |
-                        (1 << 7) | (1 << 0xe) | (1 << 0xf),
+                        (1 << 7) | (1 << 0xf),
+       },
+       [LAW_TRGT_IF_PCIE_2] = {
+               .cfg =   (1 << 3) | (1 << 0xe) | (1 << 0xf),
        },
 };
 #elif defined(CONFIG_P1011) || defined(CONFIG_P1020) || \