fsl_i2c: Do not generate STOP after read.

__i2c_read always ends with a STOP condition thereby releasing
the bus. It is cleaner to do the STOP magic in i2c_read(), like
i2c_write() does. This may also help future multimaster systems which
wants to hold on to the bus until all transactions are finished.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>

diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index 4d5552bcd5356a790db0c868d46378ee38cb7c9c..2241990f94f5c87a76af7e9933342f28a3506a52 100644 (file)
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -353,9 +353,10 @@ __i2c_read(u8 *data, int length)
                        writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK,
                               &i2c_dev[i2c_bus_num]->cr);
 
-               /* Generate stop on last byte */
+               /* Do not generate stop on last byte */
                if (i == length - 1)
-                       writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev[i2c_bus_num]->cr);
+                       writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
+                              &i2c_dev[i2c_bus_num]->cr);
 
                data[i] = readb(&i2c_dev[i2c_bus_num]->dr);
        }
@@ -378,11 +379,11 @@ i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
            && i2c_write_addr(dev, I2C_READ_BIT, 1) != 0)
                i = __i2c_read(data, length);
 
-       if (length && i2c_wait4bus()) /* Wait until STOP */
-               debug("i2c_read: wait4bus timed out\n");
-
        writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
 
+       if (i2c_wait4bus()) /* Wait until STOP */
+               debug("i2c_read: wait4bus timed out\n");
+
        if (i == length)
            return 0;