Support for multiple SGMII/TBI interfaces for TSEC ethernet

Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index f81211adb9820d18f84d4fd6bf2067fd23c9e8d6..8ab6d07303be19e7d076f0ac6425fa8aea4f6d93 100644 (file)
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -283,11 +283,13 @@ uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum)
 /* Configure the TBI for SGMII operation */
 static void tsec_configure_serdes(struct tsec_private *priv)
 {
-       tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_ANA,
+       /* Access TBI PHY registers at given TSEC register offset as opposed to the
+        * register offset used for external PHY accesses */
+       tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA,
                        TBIANA_SETTINGS);
-       tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_TBICON,
+       tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON,
                        TBICON_CLK_SELECT);
-       tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_CR,
+       tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR,
                        TBICR_SETTINGS);
 }