ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control

Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>

diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index c7dad6681d14a2201562633de6a58a8dfb657b7a..2b15a64667bac7a26ade84955da935349a0b08c2 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -36,11 +36,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static const struct gpio_bank gpio_bank_am33xx[4] = {
+static const struct gpio_bank gpio_bank_am33xx[] = {
        { (void *)AM33XX_GPIO0_BASE, METHOD_GPIO_24XX },
        { (void *)AM33XX_GPIO1_BASE, METHOD_GPIO_24XX },
        { (void *)AM33XX_GPIO2_BASE, METHOD_GPIO_24XX },
        { (void *)AM33XX_GPIO3_BASE, METHOD_GPIO_24XX },
+#ifdef CONFIG_AM43XX
+       { (void *)AM33XX_GPIO4_BASE, METHOD_GPIO_24XX },
+       { (void *)AM33XX_GPIO5_BASE, METHOD_GPIO_24XX },
+#endif
 };
 
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;

diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
index 97c00b4925ff332129a6649a1ca3c83eb37d24c9..440cf8b6aec9c6651b37b00a8a7dd2cc2bd774f1 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
@@ -94,6 +94,8 @@ void enable_basic_clocks(void)
                &cmper->gpio1clkctrl,
                &cmper->gpio2clkctrl,
                &cmper->gpio3clkctrl,
+               &cmper->gpio4clkctrl,
+               &cmper->gpio5clkctrl,
                &cmper->i2c1clkctrl,
                &cmper->emiffwclkctrl,
                &cmper->emifclkctrl,

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 248dc4d4fcd6c4410da2267b63960a917d2e2423..97e870248842fe274fbecd2befe6eec88989c4e1 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -353,7 +353,11 @@ struct cm_perpll {
        unsigned int gpio2clkctrl;      /* offset 0x480 */
        unsigned int resv20;
        unsigned int gpio3clkctrl;      /* offset 0x488 */
-       unsigned int resv21[7];
+       unsigned int resv41;
+       unsigned int gpio4clkctrl;      /* offset 0x490 */
+       unsigned int resv42;
+       unsigned int gpio5clkctrl;      /* offset 0x498 */
+       unsigned int resv21[3];
 
        unsigned int i2c1clkctrl;       /* offset 0x4A8 */
        unsigned int resv22;

diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h b/arch/arm/include/asm/arch-am33xx/gpio.h
index a1ffd49f795c151b2a40459b0c6e3685c0005da1..220603db5a3858a7764e2233a5a0ef990be52eef 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/gpio.h
+++ b/arch/arm/include/asm/arch-am33xx/gpio.h
@@ -12,8 +12,8 @@
 #define AM33XX_GPIO1_BASE       0x4804C000
 #define AM33XX_GPIO2_BASE       0x481AC000
 #define AM33XX_GPIO3_BASE       0x481AE000
-
-#define GPIO_22                        22
+#define AM33XX_GPIO4_BASE      0x48320000
+#define AM33XX_GPIO5_BASE      0x48322000
 
 /* GPIO CTRL register */
 #define GPIO_CTRL_DISABLEMODULE_SHIFT  0

diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 4e6846a50a921c3c826630ffc4e8ee17efab51a7..95fd13751b456ac28f88722372e1efd62786f083 100644 (file)
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -346,14 +346,14 @@ static void enable_vtt_regulator(void)
        u32 temp;
 
        /* enable module */
-       writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO0_BASE + OMAP_GPIO_CTRL);
-
-       /* enable output for GPIO0_22 */
-       writel(GPIO_SETDATAOUT(GPIO_22),
-              AM33XX_GPIO0_BASE + OMAP_GPIO_SETDATAOUT);
-       temp = readl(AM33XX_GPIO0_BASE + OMAP_GPIO_OE);
-       temp = temp & ~(GPIO_OE_ENABLE(GPIO_22));
-       writel(temp, AM33XX_GPIO0_BASE + OMAP_GPIO_OE);
+       writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO5_BASE + OMAP_GPIO_CTRL);
+
+       /* enable output for GPIO5_7 */
+       writel(GPIO_SETDATAOUT(7),
+              AM33XX_GPIO5_BASE + OMAP_GPIO_SETDATAOUT);
+       temp = readl(AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
+       temp = temp & ~(GPIO_OE_ENABLE(7));
+       writel(temp, AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
 }
 
 void sdram_init(void)

diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 810b1941db9d052321e79bd9987d48d1ad143661..51f7fd61d5ceff525cb5600121c99bc1e5b23602 100644 (file)
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -33,8 +33,8 @@ static struct module_pin_mux i2c0_pin_mux[] = {
        {-1},
 };
 
-static struct module_pin_mux gpio0_22_pin_mux[] = {
-       {OFFSET(ddr_ba2), (MODE(9) | PULLUP_EN)},       /* GPIO0_22 */
+static struct module_pin_mux gpio5_7_pin_mux[] = {
+       {OFFSET(spi0_cs0), (MODE(7) | PULLUP_EN)},      /* GPIO5_7 */
        {-1},
 };
 
@@ -49,7 +49,7 @@ void enable_board_pin_mux(void)
        configure_module_pin_mux(i2c0_pin_mux);
 
        if (board_is_gpevm())
-               configure_module_pin_mux(gpio0_22_pin_mux);
+               configure_module_pin_mux(gpio5_7_pin_mux);
 }
 
 void enable_i2c0_pin_mux(void)