]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: tegra: move CONFIG_TEGRAnn
authorStephen Warren <swarren@nvidia.com>
Mon, 3 Feb 2014 21:03:24 +0000 (14:03 -0700)
committerTom Warren <twarren@nvidia.com>
Wed, 5 Mar 2014 23:59:07 +0000 (16:59 -0700)
<asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/include/asm/arch-tegra114/tegra.h
arch/arm/include/asm/arch-tegra124/tegra.h
arch/arm/include/asm/arch-tegra20/tegra.h
arch/arm/include/asm/arch-tegra30/tegra.h
include/configs/tegra114-common.h
include/configs/tegra124-common.h
include/configs/tegra20-common.h
include/configs/tegra30-common.h

index 5d426b524a1e10776e73940e16c0be70596a6e2a..705ca5758e2b7ee15ced47d6ce77e7dd3bb2a786 100644 (file)
@@ -17,6 +17,8 @@
 #ifndef _TEGRA114_H_
 #define _TEGRA114_H_
 
+#define CONFIG_TEGRA114
+
 #define NV_PA_SDRAM_BASE       0x80000000      /* 0x80000000 for real T114 */
 #define NV_PA_TSC_BASE         0x700F0000      /* System Counter TSC regs */
 
index db3d8379203b254422f9b8f253708ec19ebffa92..86ebd19453ef314733789a00b11137b2a447b384 100644 (file)
@@ -8,6 +8,8 @@
 #ifndef _TEGRA124_H_
 #define _TEGRA124_H_
 
+#define CONFIG_TEGRA124
+
 #define NV_PA_SDRAM_BASE       0x80000000
 #define NV_PA_TSC_BASE         0x700F0000      /* System Counter TSC regs */
 #define NV_PA_MC_BASE          0x70019000      /* Mem Ctlr regs (MCB, etc.) */
index 18856ac3727d085977a9b5b1b70f9963f33548f4..6a4b40ec7608a906e21983f4f34d48275922e795 100644 (file)
@@ -8,6 +8,8 @@
 #ifndef _TEGRA20_H_
 #define _TEGRA20_H_
 
+#define CONFIG_TEGRA20
+
 #define NV_PA_SDRAM_BASE       0x00000000
 
 #include <asm/arch-tegra/tegra.h>
index c02c5d850037ffb7460b7df3b17f41cbf5c932ca..4ad8b1c05346abe70be867c61b88b364a7c15ff3 100644 (file)
@@ -17,6 +17,8 @@
 #ifndef _TEGRA30_H_
 #define _TEGRA30_H_
 
+#define CONFIG_TEGRA30
+
 #define NV_PA_SDRAM_BASE       0x80000000      /* 0x80000000 for real T30 */
 
 #include <asm/arch-tegra/tegra.h>
index a4e8a5f5eb53824205ac3bb032bd8785f47d3316..1bf5af5b3830cc29cdf1c558b7b1634629932974 100644 (file)
  */
 #define V_NS16550_CLK          408000000       /* 408MHz (pllp_out0) */
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_TEGRA114                        /* in a NVidia Tegra114 core */
-
 /* Environment information, boards can override if required */
 #define CONFIG_LOADADDR                0x80408000      /* def. location for kernel */
 
index 0a4541bd20e6da5f7c9d808c481da63e0fed0444..4568bc761ecdbd0ec4482e5ba711aa668cf721af 100644 (file)
  */
 #define V_NS16550_CLK          408000000       /* 408MHz (pllp_out0) */
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_TEGRA124                        /* is an NVIDIA Tegra124 core */
-
 /* Environment information, boards can override if required */
 #define CONFIG_LOADADDR                0x80408000      /* def. location for kernel */
 
index b009a316b14cd29e4389e64dfef8cbfec111bf3c..d2c45321b46a3a2ef648c4d2fc2d8dc1274d58d1 100644 (file)
  */
 #define V_NS16550_CLK          216000000       /* 216MHz (pllp_out0) */
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_TEGRA20                         /* in a NVidia Tegra20 core */
-
 /* Environment information, boards can override if required */
 #define CONFIG_LOADADDR                0x00408000      /* def. location for kernel */
 
index b5550d7d099c74bed362573f003e478196eb35f9..edb930e032bcc40dd8b80f2d65a6721a1a2e3c8e 100644 (file)
  */
 #define V_NS16550_CLK          408000000       /* 408MHz (pllp_out0) */
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_TEGRA30                 /* in a NVidia Tegra30 core */
-
 /* Environment information, boards can override if required */
 #define CONFIG_LOADADDR                0x80408000      /* def. location for kernel */