imx: mx8m: add memory mapping for CAAM and TCM

Otherwise can't boot the M4 core as it is impossible to load its
firmware into the TCM memory.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/mach-imx/mx8m/soc.c b/arch/arm/mach-imx/mx8m/soc.c
index 46873aa8ddf31cc528fe9a798a6cb92782093e6f..11251c5f9ad98184bd415513c4917c2006d4a621 100644 (file)
--- a/arch/arm/mach-imx/mx8m/soc.c
+++ b/arch/arm/mach-imx/mx8m/soc.c
@@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = {
                .size = 0x100000UL,
                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
                         PTE_BLOCK_OUTER_SHARE
+       }, {
+               /* CAAM */
+               .virt = 0x100000UL,
+               .phys = 0x100000UL,
+               .size = 0x8000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* TCM */
+               .virt = 0x7C0000UL,
+               .phys = 0x7C0000UL,
+               .size = 0x80000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
                /* OCRAM */
                .virt = 0x900000UL,