# Copyright 2004 Freescale Semiconductor.
-# Modified by Jeff Brown (jeffrey@freescale.com)
+# Modified by Jeff Brown
#
# See file CREDITS for list of people who contributed to this
# project.
/*
* Copyright 2004 Freescale Semiconductor.
- * Jeff Brown (jeffrey@freescale.com)
+ * Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
* See file CREDITS for list of people who contributed to this
#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff)
-/*#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) */
#define LAWAR3 (~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)))
/*
#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff)
-/*#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)) */
#define LAWAR6 (~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)))
#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff)
#define LAWAR8 ((LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_512M)) & ~LAWAR_EN)
#endif
- .section .bootpg, "ax"
+ .section .bootpg, "ax"
.globl law_entry
law_entry:
lis r7,CFG_CCSRBAR@h
stwu r6, 0x20(r4)
lis r6,LAWAR2@h
- ori r6,r6,LAWAR2@l
- stwu r6, 0x20(r5)
+ ori r6,r6,LAWAR2@l
+ stwu r6, 0x20(r5)
/* LAWBAR3, LAWAR3 */
lis r6,LAWBAR3@h
ori r6,r6,LAWBAR4@l
stwu r6, 0x20(r4)
- lis r6,LAWAR4@h
+ lis r6,LAWAR4@h
ori r6,r6,LAWAR4@l
stwu r6, 0x20(r5)
/* LAWBAR5, LAWAR5 */
ori r6,r6,LAWAR7@l
stwu r6, 0x20(r5)
- /* LAWBAR8, LAWAR8 */
- lis r6,LAWBAR8@h
- ori r6,r6,LAWBAR8@l
- stwu r6, 0x20(r4)
+ /* LAWBAR8, LAWAR8 */
+ lis r6,LAWBAR8@h
+ ori r6,r6,LAWBAR8@l
+ stwu r6, 0x20(r4)
- lis r6,LAWAR8@h
- ori r6,r6,LAWAR8@l
- stwu r6, 0x20(r5)
+ lis r6,LAWAR8@h
+ ori r6,r6,LAWAR8@l
+ stwu r6, 0x20(r5)
blr
/*
* Copyright 2004 Freescale Semiconductor.
- * Jeff Brown (jeffrey@freescale.com)
+ * Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
goto my_usage;
}
- my_usage:
+my_usage:
puts("\nUsage: reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n");
puts(" reset altbank [cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>]\n");
puts(" reset altbank [wd]\n");
/*
* (C) Copyright 2004, Freescale, Inc.
* (C) Copyright 2002,2003, Motorola,Inc.
- * Jeff Brown (jeffrey@freescale.com)
+ * Jeff Brown
*
* See file CREDITS for list of people who contributed to this
* project.
# Xianghua Xiao,X.Xiao@motorola.com
#
# (C) Copyright 2004 Freescale Semiconductor. (MC86xx Port)
-# Jeff Brown (Jeffrey@freescale.com)
+# Jeff Brown
# See file CREDITS for list of people who contributed to this
# project.
#
START = start.o #resetvec.o
ASOBJS = cache.o
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \
- pci.o i2c.o spd_sdram.o
+ pci.o i2c.o spd_sdram.o
OBJS = $(COBJS)
all: .depend $(START) $(ASOBJS) $(LIB)
#
# (C) Copyright 2004 Freescale Semiconductor.
-# Jeff Brown <jeffrey@freescale.com>
+# Jeff Brown
#
# See file CREDITS for list of people who contributed to this
# project.
PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
-PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx -ffixed-r2 -ffixed-r29 -mstring
\ No newline at end of file
+PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx -ffixed-r2 -ffixed-r29 -mstring
/*
* Copyright 2004 Freescale Semiconductor.
- * Jeff Brown (jeffrey@freescale.com)
+ * Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
* See file CREDITS for list of people who contributed to this
/* enable SYNCBE | ABE bits in HID1 */
set_hid1(get_hid1() | 0x00000C00);
-
- /* Since the bats have been set up at this point and
- * the local bus registers have been initialized, we
- * turn on the WDEN bit in PIXIS_VCTL
- */
-/* val = in8(PIXIS_BASE+PIXIS_VCTL); */
- /* Set the WDEN */
-/* val |= 0x08; */
-/* out8(PIXIS_BASE+PIXIS_VCTL,val); */
}
/*
* Gleb Natapov <gnatapov@mrv.com>
* Some bits are taken from linux driver writen by adrian@humboldt.co.uk
*
- * Modified for MPC86xx by Jeff Brown (jeffrey@freescale.com)
+ * Modified for MPC86xx by Jeff Brown
*
* Hardware I2C driver for MPC107 PCI bridge.
*
i = __i2c_read(data, length);
- exit:
+exit:
writeb(MPC86xx_I2CCR_MEN, I2CCCR);
return !(i == length);
i = __i2c_write(data, length);
- exit:
+exit:
writeb(MPC86xx_I2CCR_MEN, I2CCCR);
return !(i == length);
* Xianghua Xiao (X.Xiao@motorola.com)
*
* (C) Copyright 2004 Freescale Semiconductor. (MPC86xx Port)
- * Jeff Brown (Jeffrey@freescale.com)
+ * Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
* See file CREDITS for list of people who contributed to this
#include <asm/processor.h>
#include <ppc_asm.tmpl>
-unsigned long decrementer_count; /* count value for 1e6/HZ microseconds */
-
-
+unsigned long decrementer_count; /* count value for 1e6/HZ microseconds */
unsigned long timestamp;
+
static __inline__ unsigned long get_msr (void)
{
unsigned long msr;
/* interrupt is not supported yet */
int interrupt_init_cpu (unsigned *decrementer_count)
{
- return 0;
+ return 0;
}
if (ret)
return ret;
- decrementer_count = get_tbclk()/CFG_HZ;
- debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n", (get_tbclk()/1000000), decrementer_count);
+ decrementer_count = get_tbclk()/CFG_HZ;
+ debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n", (get_tbclk()/1000000), decrementer_count);
- set_dec (decrementer_count);
+ set_dec (decrementer_count);
set_msr (get_msr () | MSR_EE);
- debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n", get_msr(), get_dec());
+ debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n", get_msr(), get_dec());
return 0;
}
void increment_timestamp(void)
{
- timestamp++;
+ timestamp++;
}
/*
void timer_interrupt (struct pt_regs *regs)
{
- /* call cpu specific function from $(CPU)/interrupts.c */
- timer_interrupt_cpu (regs);
+ /* call cpu specific function from $(CPU)/interrupts.c */
+ timer_interrupt_cpu (regs);
- timestamp++;
+ timestamp++;
- ppcDcbf(×tamp);
+ ppcDcbf(×tamp);
- /* Restore Decrementer Count */
- set_dec (decrementer_count);
+ /* Restore Decrementer Count */
+ set_dec (decrementer_count);
#if defined(CONFIG_WATCHDOG) || defined (CONFIG_HW_WATCHDOG)
if ((timestamp % (CFG_WATCHDOG_FREQ)) == 0)
void reset_timer (void)
{
- timestamp = 0;
+ timestamp = 0;
}
ulong get_timer (ulong base)
{
- return timestamp - base;
+ return timestamp - base;
}
void set_timer (ulong t)
{
- timestamp = t;
+ timestamp = t;
}
/*
}
-
-/*******************************************************************************
- *
+/*
* irqinfo - print information about PCI devices,not implemented.
- *
*/
int
do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/*
* Copyright 2004 Freescale Semiconductor.
- * Jeff Brown (jeffrey@freescale.com)
+ * Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
* (C) Copyright 2000-2002
#include <mpc86xx.h>
#include <asm/processor.h>
-unsigned long get_board_sys_clk(ulong dummy);
-unsigned long get_sysclk_from_px_regs(void);
-
void get_sys_info (sys_info_t *sysInfo)
{
volatile ccsr_gur_t *gur = &immap->im_gur;
uint plat_ratio, e600_ratio;
- plat_ratio = (gur->porpllsr) & 0x0000003e;
+ plat_ratio = (gur->porpllsr) & 0x0000003e;
plat_ratio >>= 1;
switch(plat_ratio) {
- case 0x0:
+ case 0x0:
sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
break;
case 0x02:
case 0x09:
case 0x0a:
case 0x0c:
- case 0x10:
- sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
- break;
+ case 0x10:
+ sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+ break;
default:
sysInfo->freqSystemBus = 0;
break;
}
-#if 0
- printf("assigned system bus freq = %d for plat ratio 0x%08lx\n",
- sysInfo->freqSystemBus, plat_ratio);
-#endif
-
e600_ratio = (gur->porpllsr) & 0x003f0000;
e600_ratio >>= 16;
case 0x10:
sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
break;
- case 0x19:
+ case 0x19:
sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus/2;
break;
case 0x20:
sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
break;
- case 0x39:
+ case 0x39:
sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus/2;
break;
case 0x28:
case 0x1d:
sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus/2;
break;
- default:
- /* JB - Emulator workaround until real cop is plugged in */
- /* sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus; */
+ default:
sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
break;
}
-#if 0
- printf("assigned processor freq = %d for e600 ratio 0x%08lx\n",
- sysInfo->freqProcessor, e600_ratio);
-#endif
}
* get_bus_freq
* Return system bus freq in Hz
*/
+
ulong get_bus_freq(ulong dummy)
{
ulong val;
return val;
}
-unsigned long get_sysclk_from_px_regs()
-{
- ulong val;
- u8 vclkh, vclkl;
-
- vclkh = in8(PIXIS_BASE + PIXIS_VCLKH);
- vclkl = in8(PIXIS_BASE + PIXIS_VCLKL);
-
- if ((vclkh == 0x84) && (vclkl == 0x07)) {
- val = 33000000;
- }
- if ((vclkh == 0x3F) && (vclkl == 0x20)) {
- val = 40000000;
- }
- if ((vclkh == 0x3F) && (vclkl == 0x2A)) {
- val = 50000000;
- }
- if ((vclkh == 0x24) && (vclkl == 0x04)) {
- val = 66000000;
- }
- if ((vclkh == 0x3F) && (vclkl == 0x4B)) {
- val = 83000000;
- }
- if ((vclkh == 0x3F) && (vclkl == 0x5C)) {
- val = 100000000;
- }
- if ((vclkh == 0xDF) && (vclkl == 0x3B)) {
- val = 134000000;
- }
- if ((vclkh == 0xDF) && (vclkl == 0x4B)) {
- val = 166000000;
- }
-
- return val;
-}
-
/*
* get_board_sys_clk
projects / u-boot.git / commitdiff