sunxi: Enable NAND controller on the CHIP

Enable the NAND controller in the sun5i-r8-chip.dts.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>

diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi
index bddd0de88af6be1d3e68b027b644a56e5e0ee61b..a5f8855389a17cdc85dfa21990ca9635d3989eaa 100644 (file)
--- a/arch/arm/dts/sun5i-a10s.dtsi
+++ b/arch/arm/dts/sun5i-a10s.dtsi
@@ -241,6 +241,20 @@
                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
        };
+
+       nand_cs2_pins_a: nand_cs@2 {
+               allwinner,pins = "PC17";
+               allwinner,function = "nand0";
+               allwinner,drive = <0>;
+               allwinner,pull = <0>;
+       };
+
+       nand_cs3_pins_a: nand_cs@3 {
+               allwinner,pins = "PC18";
+               allwinner,function = "nand0";
+               allwinner,drive = <0>;
+               allwinner,pull = <0>;
+       };
 };
 
 &sram_a {

diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts
index b3c234c65ea19bb1f69984f350db0dad7ceea440..30e069a6cf4a8a50c15c0d4b5c55666985c0b548 100644 (file)
--- a/arch/arm/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino.dts
@@ -155,6 +155,21 @@
        status = "okay";
 };
 
+&nfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
+       status = "okay";
+
+       nand@0 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               reg = <0>;
+               allwinner,rb = <0>;
+               nand-ecc-mode = "hw";
+               allwinner,randomize;
+       };
+};
+
 &ohci0 {
        status = "okay";
 };

diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts
index 6ad19e272f4bc94904d6ed4fefab8cca835f6e13..b1b62d511645e095e62737614651723cd7947701 100644 (file)
--- a/arch/arm/dts/sun5i-r8-chip.dts
+++ b/arch/arm/dts/sun5i-r8-chip.dts
@@ -142,6 +142,21 @@
        status = "okay";
 };
 
+&nfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
+       status = "okay";
+
+       nand@0 {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               reg = <0>;
+               allwinner,rb = <0>;
+               nand-ecc-mode = "hw";
+               nand-on-flash-bbt;
+       };
+};
+
 &ohci0 {
        status = "okay";
 };