mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to Kconfig

Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13,
SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig.
Move existing macros to related Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
[trini: Migrate bk4r1]
Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 52a9f39c636ce870a504e6d01d4d2d8dcce6c6e5..0ed36cded4860114ce1bb34ddd0af96e09706f06 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -546,6 +546,7 @@ config ARCH_RMOBILE
 config TARGET_S32V234EVB
        bool "Support s32v234evb"
        select ARM64
+       select SYS_FSL_ERRATUM_ESDHC111
 
 config ARCH_SNAPDRAGON
        bool "Qualcomm Snapdragon SoCs"
@@ -602,22 +603,31 @@ config TARGET_TS4600
 config TARGET_TS4800
        bool "Support TS4800"
        select CPU_V7
+       select SYS_FSL_ERRATUM_ESDHC_A001
 
 config TARGET_VF610TWR
        bool "Support vf610twr"
        select CPU_V7
+       select SYS_FSL_ERRATUM_ESDHC111
 
 config TARGET_COLIBRI_VF
        bool "Support Colibri VF50/61"
        select CPU_V7
+       select SYS_FSL_ERRATUM_ESDHC111
 
 config TARGET_PCM052
        bool "Support pcm-052"
        select CPU_V7
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_ESDHC135
+       select SYS_FSL_ERRATUM_ESDHC_A001
 
 config TARGET_BK4R1
        bool "Support BK4r1"
        select CPU_V7
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_ESDHC135
+       select SYS_FSL_ERRATUM_ESDHC_A001
 
 config ARCH_ZYNQ
        bool "Xilinx Zynq Platform"

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 6e4a93172fa471167e2ab09722174d5343564815..184063c40bf9a3e1f8efb0080ae3957a9585dacd 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -22,6 +22,7 @@ config TARGET_VME8349
 
 config TARGET_MPC8308RDB
        bool "Support MPC8308RDB"
+       select SYS_FSL_ERRATUM_ESDHC111
 
 config TARGET_MPC8313ERDB
        bool "Support MPC8313ERDB"
@@ -69,9 +70,11 @@ config TARGET_TQM834X
 
 config TARGET_HRCON
        bool "Support hrcon"
+       select SYS_FSL_ERRATUM_ESDHC111
 
 config TARGET_STRIDER
        bool "Support strider"
+       select SYS_FSL_ERRATUM_ESDHC111
 
 endchoice
 

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 307a45d6c4ae286a7133d4a8866ca9a711fe1064..0a4fa42b21cc4d565fc0b99e1dd0b8391c883354 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -348,6 +348,7 @@ config ARCH_B4860
 config ARCH_BSC9131
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -356,6 +357,7 @@ config ARCH_BSC9131
 config ARCH_BSC9132
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -365,6 +367,7 @@ config ARCH_BSC9132
 config ARCH_C29X
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -455,6 +458,7 @@ config ARCH_MPC8572
 config ARCH_P1010
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -464,6 +468,7 @@ config ARCH_P1010
 config ARCH_P1011
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -473,6 +478,7 @@ config ARCH_P1011
 config ARCH_P1020
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -482,6 +488,7 @@ config ARCH_P1020
 config ARCH_P1021
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -491,6 +498,7 @@ config ARCH_P1021
 config ARCH_P1022
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -508,6 +516,7 @@ config ARCH_P1023
 config ARCH_P1024
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -517,6 +526,7 @@ config ARCH_P1024
 config ARCH_P1025
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -526,6 +536,8 @@ config ARCH_P1025
 config ARCH_P2020
        bool
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_ESDHC_A001
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -536,6 +548,7 @@ config ARCH_P2041
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -545,6 +558,7 @@ config ARCH_P3041
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -554,6 +568,9 @@ config ARCH_P4080
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
+       select SYS_FSL_ERRATUM_ESDHC13
+       select SYS_FSL_ERRATUM_ESDHC135
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -563,6 +580,7 @@ config ARCH_P5020
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -572,6 +590,7 @@ config ARCH_P5040
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -584,6 +603,7 @@ config ARCH_T1023
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
@@ -594,6 +614,7 @@ config ARCH_T1024
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
@@ -604,6 +625,7 @@ config ARCH_T1040
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
@@ -614,6 +636,7 @@ config ARCH_T1042
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_SEC
@@ -624,6 +647,7 @@ config ARCH_T2080
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
@@ -633,6 +657,7 @@ config ARCH_T2081
        bool
        select E500MC
        select FSL_LAW
+       select SYS_FSL_ERRATUM_ESDHC111
        select SYS_FSL_HAS_DDR3
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 6aee5bcca1b17a4f70e88bda1adc76d1b4db57ae..aa06e640a8dcc6d2707c272972fca5677f6024af 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -81,7 +81,6 @@
 #elif defined(CONFIG_ARCH_P1010)
 #define CONFIG_FSL_SDHC_V2_3
 #define CONFIG_TSECV2
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  4
@@ -107,7 +106,6 @@
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
@@ -115,7 +113,6 @@
 #define CONFIG_TSECV2
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
@@ -126,7 +123,6 @@
 #define CONFIG_TSECV2
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define QE_MURAM_SIZE                  0x6000UL
 #define MAX_QE_RISC                    1
 #define QE_NUM_OF_SNUM                 28
@@ -138,7 +134,6 @@
 #define CONFIG_TSECV2
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_FSL_SATA_ERRATUM_A001
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
@@ -164,7 +159,6 @@
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A004508
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
@@ -174,7 +168,6 @@
 #define CONFIG_TSECV2
 #define CONFIG_FSL_PCIE_DISABLE_ASPM
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define QE_MURAM_SIZE                  0x6000UL
 #define MAX_QE_RISC                    1
 #define QE_NUM_OF_SNUM                 28
@@ -182,8 +175,6 @@
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 
 #elif defined(CONFIG_ARCH_P2020)
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS  2
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
 #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
@@ -209,7 +200,6 @@
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 #define CONFIG_SYS_FSL_ERRATUM_USB14
 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
@@ -244,7 +234,6 @@
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        2
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 #define CONFIG_SYS_FSL_ERRATUM_USB14
 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
@@ -283,9 +272,6 @@
 #define CONFIG_SYS_FSL_ERRATUM_CPC_A003
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC13
 #define CONFIG_SYS_P4080_ERRATUM_CPU22
 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 #define CONFIG_SYS_P4080_ERRATUM_SERDES8
@@ -328,7 +314,6 @@
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_USB14
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
@@ -362,7 +347,6 @@
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB2_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_USB14
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003
 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
@@ -383,7 +367,6 @@
 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT     0xff600000
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  3
 #define CONFIG_NAND_FSL_IFC
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A005125
 #define CONFIG_SYS_FSL_ERRATUM_A004477
 #define CONFIG_ESDHC_HC_BLK_ADDR
@@ -400,7 +383,6 @@
 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT     0xff600000
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  3
 #define CONFIG_NAND_FSL_IFC
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.2"
 #define CONFIG_SYS_FSL_ERRATUM_A005125
@@ -560,7 +542,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
 #define QE_MURAM_SIZE                  0x6000UL
 #define MAX_QE_RISC                    1
@@ -598,7 +579,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
 #define QE_MURAM_SIZE                  0x6000UL
 #define MAX_QE_RISC                    1
@@ -651,7 +631,6 @@
 #define CONFIG_SYS_FSL_ERRATUM_A007212
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 #define CONFIG_SYS_FSL_ISBC_VER                2
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ERRATUM_A006593
 #define CONFIG_SYS_FSL_ERRATUM_A007186
 #define CONFIG_SYS_FSL_ERRATUM_A006379
@@ -663,7 +642,6 @@
 #elif defined(CONFIG_ARCH_C29X)
 #define CONFIG_FSL_SDHC_V2_3
 #define CONFIG_TSECV2_1
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_SYS_FSL_DDR_VER         FSL_DDR_VER_4_6
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 2ba1254d70e299241a03c8df7d1597e0943b7a7a..c3462ab72413659312be133dd60f78fe98097ebf 100644 (file)
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -207,3 +207,15 @@ config MMC_SDHCI_SPEAR
 endif
 
 endmenu
+
+config SYS_FSL_ERRATUM_ESDHC111
+       bool
+
+config SYS_FSL_ERRATUM_ESDHC13
+       bool
+
+config SYS_FSL_ERRATUM_ESDHC135
+       bool
+
+config SYS_FSL_ERRATUM_ESDHC_A001
+       bool

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 753ce1353c14dc12a84c0d14b865eebf95820126..7107a47f34417510f2ec047f7d2a9e066f3a2207 100644 (file)
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -24,7 +24,6 @@
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 #define CONFIG_SYS_FSL_ESDHC_USE_PIO
 
 #define CONFIG_GENERIC_MMC

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 933b179be35b2cb9cfa78aaaf455f33d44f3a8c2..4cfd5b9788bd6997e594602350e565f4448b328b 100644 (file)
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -60,8 +60,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION
 

diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 9f076576e50b37c7ca3d19877ea250a1c5955eb6..b2247060409aafb4b6341d64576e52c83b7e7cf5 100644 (file)
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -26,7 +26,6 @@
 
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION

diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 3963efd1dd9ff7c370a4efe5e7717708770eb2a5..f3cf95469a2b94857d8d051e8566f2b72190a9c6 100644 (file)
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -70,9 +70,6 @@
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
 
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION

diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h
index c55f6b9700073cb8cd3c133c88be429386afe8e9..9ee68dde7bd5c1d3ea7d2ade73896919ec9a9d16 100644 (file)
--- a/include/configs/s32v234evb.h
+++ b/include/configs/s32v234evb.h
@@ -82,8 +82,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC_BASE_ADDR
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-
 #define CONFIG_CMD_MMC
 #define CONFIG_GENERIC_MMC
 /* #define CONFIG_CMD_EXT2 EXT2 Support */

diff --git a/include/configs/strider.h b/include/configs/strider.h
index 9733299148c41ac810810cc5e6a3d0067029e9d3..3be25976a48f67a6320757fb9d49f3a64e87e01c 100644 (file)
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -26,7 +26,6 @@
 
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
 
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION

diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
index 9050ae42b92f947ee049ae5f163ca09d1eb2aa9d..a451acf1f4bf604c286e6840f3257cbb6456b0c5 100644 (file)
--- a/include/configs/ts4800.h
+++ b/include/configs/ts4800.h
@@ -59,8 +59,6 @@
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      MMC_SDHC1_BASE_ADDR
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
-
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION
 

diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 20f0d6eafcff64358c61a69c45512c411b067136..f122c9886f90c5f7f85eb59928043806de56c244 100644 (file)
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -68,8 +68,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
-
 #define CONFIG_GENERIC_MMC
 #define CONFIG_DOS_PARTITION
 

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 797611d0e6b91795c26294baba743cc419ffa65a..55d1546c03bc9594f0e6259cddcc1eed89646c0d 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -5401,10 +5401,6 @@ CONFIG_SYS_FSL_ERRATUM_DDR_115
 CONFIG_SYS_FSL_ERRATUM_DDR_A003
 CONFIG_SYS_FSL_ERRATUM_DDR_A003474
 CONFIG_SYS_FSL_ERRATUM_ELBC_A001
-CONFIG_SYS_FSL_ERRATUM_ESDHC111
-CONFIG_SYS_FSL_ERRATUM_ESDHC13
-CONFIG_SYS_FSL_ERRATUM_ESDHC135
-CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
 CONFIG_SYS_FSL_ERRATUM_I2C_A004447
 CONFIG_SYS_FSL_ERRATUM_IFC_A002769
 CONFIG_SYS_FSL_ERRATUM_IFC_A003399