rockchip: Kconfig: enable SPL support for rk3328

Enable SPL support and some related option in Kconfig.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[cherry picked from https://github.com/rockchip-linux/u-boot/commit/430b01462bf3f24aaf7920ae2587a6943c39ab5d with minor modifications]
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c05e3c3f48626c00b5c9d129b4c9b5babb4c6992..3e38344b5022e89702c5cba80d168269f033f2ee 100644 (file)
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -109,6 +109,13 @@ endif
 config ROCKCHIP_RK3328
        bool "Support Rockchip RK3328"
        select ARM64
+       select SUPPORT_SPL
+       select SPL
+       imply SPL_SERIAL_SUPPORT
+       imply SPL_SEPARATE_BSS
+       select ENABLE_ARM_SOC_BOOT0_HOOK
+       select DEBUG_UART_BOARD_INIT
+       select SYS_NS16550
        help
          The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
          including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index aff9c32362dee40de477eb85ff2552a6694a5e39..92d6817ad5fab46820bf7f3ce8d8d07cd14a48dc 100644 (file)
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -1,7 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_TEXT_BASE=0x00200000
 CONFIG_ROCKCHIP_RK3328=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -19,11 +22,15 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1